MT46H16M16LFBF-6 IT:A Micron Technology Inc, MT46H16M16LFBF-6 IT:A Datasheet - Page 76

IC DDR SDRAM 256MBIT 60VFBGA

MT46H16M16LFBF-6 IT:A

Manufacturer Part Number
MT46H16M16LFBF-6 IT:A
Description
IC DDR SDRAM 256MBIT 60VFBGA
Manufacturer
Micron Technology Inc
Type
DDR SDRAMr

Specifications of MT46H16M16LFBF-6 IT:A

Format - Memory
RAM
Memory Type
Mobile DDR SDRAM
Memory Size
256M (16Mx16)
Speed
166MHz
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.95 V
Operating Temperature
-40°C ~ 85°C
Package / Case
60-VFBGA
Organization
16Mx16
Density
256Mb
Address Bus
15b
Access Time (max)
6.5/5ns
Maximum Clock Rate
166MHz
Operating Supply Voltage (typ)
1.8V
Package Type
VFBGA
Operating Temp Range
-40C to 85C
Operating Supply Voltage (max)
1.95V
Operating Supply Voltage (min)
1.7V
Supply Current
100mA
Pin Count
60
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / Rohs Status
Compliant
Other names
Q3368612
Figure 48:
PDF: 09005aef82091978 / Source: 09005aef8209195b
MT46H16M16LF__2.fm - Rev. H 6/08 EN
Command
BA0, BA1
A11, A12
A0–A9
DQS
DQ
CK#
CKE
A10
DM
CK
4
1
t IS
t IS
NOP
Bank Write – with Auto Precharge
T0
t IH
t IH
5
Notes:
t IS
t IS
Bank x
ACT
RA
RA
RA
T1
1. D
2. BL = 4 in the case shown.
3. A10 = HIGH, enable auto precharge.
4. ACT = ACTIVE; RA = row address; BA = bank address.
5. NOP commands are shown for ease of illustration; other commands may be valid at these
6.
7.
t IH
t IH
order.
times.
t
t
t CK
DSH is applicable during
DSS is applicable during
IN
n = data-in from column n; subsequent elements are provided in the programmed
t RCD
t RAS
NOP
T2
5
t CH
t CL
WRITE
t IS
Bank x
Col n
3
T3
t DQSS (NOM)
t IH
2
t WPRES t WPRE
t
t
DQSS (MIN) and is referenced from CK T5 or T6.
DQSS (MIN) and is referenced from CK T4 or T5.
t DS
76
NOP
T4
DI
b
5
t DH
T4n
Micron Technology, Inc., reserves the right to change products or specifications without notice.
256Mb: x16, x32 Mobile DDR SDRAM
t DQSL t DQSH t WPST
NOP
T5
5
T5n
Transitioning data
NOP
T6
5
©2005 Micron Technology, Inc. All rights reserved.
Timing Diagrams
t WR
NOP
T7
5
Don’t Care
NOP
T8
5
t RP

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