IS43R32800B-5BL-TR ISSI, Integrated Silicon Solution Inc, IS43R32800B-5BL-TR Datasheet - Page 14

• Manufacturer Part Number: IS43R32800B-5BL-TR
• Description: IC DDR SDRAM 256MBIT 144BGA
• Manufacturer: ISSI, Integrated Silicon Solution Inc
• Type: DDR SDRAMr

Specifications of IS43R32800B-5BL-TR

• Format - Memory: RAM
• Memory Type: DDR SDRAM
• Memory Size: 256M (8Mx32)
• Speed: 200MHz
• Interface: Parallel
• Voltage - Supply: 2.4 V ~ 2.6 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 144-BGA
• Organization: 8Mx32
• Density: 256Mb
• Address Bus: 14b
• Access Time (max): 700ps
• Maximum Clock Rate: 400MHz
• Operating Supply Voltage (typ): 2.5V
• Package Type: Mini BGA
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 2.7V
• Operating Supply Voltage (min): 2.3V
• Supply Current: 400mA
• Pin Count: 144
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

IS43R32800B
14
IDD4 W
Symbol
AVERAGE SUPPLY CURRENT FROM V
IDD3 P
IDD4 R
IDD2 N
IDD3 N
IDD2 P
IDD1
IDD5 AU TO REFRESH C URRENT : t RC = t RF C ( MI N)
IDD6 SELF REFRESH C URRENT : C KE < 0.2V
V
DD
= V
DDQ
OPER AT IN G C URRENT : One Bank; A ctive-Read-Precharge ;Burst = 2;
tRC = t RC MI N; t CK = t CK M IN ; I OUT = 0mA; A ddress andcontrol
inputs chang ing o nce per clock cycle
PR ECHA RG E P OW ER- DOW N S TA NDB Y C URRENT : A ll banks idle;
power-down mode; CK E < VI L ( MA X) ; t CK = t CK MI N
ID LE STANDB Y C URRENT : /CS > VI H ( MI N) ; A ll banks idle;
CK E > VI H ( MI N) ; t CK = t CK MI N; Address andother control inputs
changingonce per clock cycle
AC TI VE POWE R DOW N S TA NDB Y C URRENT : One bankactive;power
down mode;C KE < VI L( MA X) ;t CK = t CK MI N
AC TI VE STANDB Y C URRE NT: /CS > VI H ( MI N) ; C KE > VI H ( MI N) ;
One bank; Ac tive-Precharge; t RC = t RA S M AX ; t CK = t CK MI N;
DQ,DM andDQS inputs chang ing twice per clock cycle; address andother
control i nputs changing once per clock cycle
OPER AT IN G C URRENT : B urst =2; R ead ; Continuous burst;Al l banks
active; Address andcontrol i nputs chang ing once per clock cycle;t CK = t
CK MI N; IOUT = 0 mA
OPER AT IN G C URRENT : B urst =2; W rite ; C ontinuous burst;Al l banks
active; Address andcontrol i nputs changi n gonce per clock cycle;t CK = t
CK MI N; DQ andDQS inputs changingtwice per clock cycle
= 2.5V + 0.2V, V ss = V ssQ = 0V , Output Open, unless otherwise noted
Pa ra me ter/ T estCondition s
DD
250
105
400
400
250
40
70
55
Integrated Silicon Solution, Inc. — www.issi.com
5
-5
Limits(Max.)
360
240
100
360
230
65
35
50
-6
5
360
240
-75
230
100
360
50
65
35
5
Unit
mA
Notes
Rev. 00D
03/19/08