MT46V128M4BN-6:D Micron Technology Inc, MT46V128M4BN-6:D Datasheet - Page 79

• Manufacturer Part Number: MT46V128M4BN-6:D
• Description: IC DDR SDRAM 512MBIT 6NS 60FBGA
• Manufacturer: Micron Technology Inc

Specifications of MT46V128M4BN-6:D

• Format - Memory: RAM
• Memory Type: DDR SDRAM
• Memory Size: 512M (128Mx4)
• Speed: 6ns
• Interface: Parallel
• Voltage - Supply: 2.3 V ~ 2.7 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 60-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 52:
AUTO REFRESH
PDF: 09005aef80a1d9d4/Source: 09005aef82a95a3a
DDR_x4x8x16_Core2.fm - 512Mb DDR: Rev. L; Core DDR Rev. A 4/07 EN
COMMAND
ADDRESS
BA0, BA1
DQS
DQ 4
CK#
CKE
A10
DM
CK
t
t
IS
Bank WRITE – with Auto Precharge
IS
NOP
T0
t
1
t
IH
IH
Notes:
t
IS
Bank x
t
IS
ACT
Row
Row
T1
1. NOP commands are shown for ease of illustration; other commands may be valid at these
2. BL = 4.
3. Enable auto precharge.
4. DI n = data-out from column n; subsequent elements are provided in the programmed
5. See Figure 50 on page 77 for detailed DQ timing.
During auto refresh, the addressing is generated by the internal refresh controller. This
makes the address bits a “Don’t Care” during an AUTO REFRESH command. The DDR
SDRAM requires AUTO REFRESH cycles at an average interval of
To allow for improved efficiency in scheduling and switching between tasks, some flexi-
bility in the absolute refresh interval is provided. A maximum of eight AUTO REFRESH
commands can be posted to any given DDR SDRAM, meaning that the maximum abso-
lute interval between any AUTO REFRESH command and the next AUTO REFRESH
command is 9 x
fications exceed the JEDEC requirement by one clock. This maximum absolute interval
is to allow future support for DLL updates, internal to the DDR SDRAM, to be restricted
to AUTO REFRESH cycles, without allowing excessive drift in
t
IH
t
IH
times.
order.
t
CK
t
t
RCD
RAS
NOP
T2
1
t
CH
t
REFI(=
t
CL
t
3
IS
Bank x
WRITE
Col n
T3
t
t
t
REFC). JEDEC specifications only allow 8 x
IH
DQSS (NOM)
2
t
WPRES
79
t
DS
t
WPRE
NOP
T4
DI
b
1
t
DH
Micron Technology, Inc., reserves the right to change products or specifications without notice.
T4n
t
DQSL
NOP
T5
512Mb: x4, x8, x16 DDR SDRAM
t
1
DQSH
T5n
t
WPST
DON’T CARE
NOP
T6
1
t
AC between updates.
©2000 Micron Technology, Inc. All rights reserved.
t
REFI (MAX).
t
t
NOP
WR
REFI; Micron speci-
T7
TRANSITIONING DATA
1
Operations
NOP
T8
1
t
RP