MT47H64M8CB-5E:B Micron Technology Inc, MT47H64M8CB-5E:B Datasheet - Page 95

• Manufacturer Part Number: MT47H64M8CB-5E:B
• Description: IC DDR2 SDRAM 512MBIT 5NS 60FBGA
• Manufacturer: Micron Technology Inc

Specifications of MT47H64M8CB-5E:B

• Format - Memory: RAM
• Memory Type: DDR2 SDRAM
• Memory Size: 512M (64M x 8)
• Speed: 5ns
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.9 V
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 60-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 29:
PDF: 09005aef8117c18e, Source: 09005aef8211b2e6
512MbDDR2_2.fm - Rev. K 8/06 EN
(V/ns)
Slew
Rate
DQ
2.0
1.5
1.0
0.9
0.8
0.7
0.6
0.5
0.4
Δ
–100 –188 –100 –188 –100 –188
100
–13
–22
–34
–60
t
67
2.8 V/ns
–5
0
DS Δ
DDR2-667
Notes: 1–7; all units in ps
–125
–14
–31
–54
–83
t
63
42
0
DH Δ
Notes:
100
–13
–22
–34
–60
2.4 V/ns
t
67
–5
0
DS Δ
t
DS,
1. For all input signals the total
2.
3.
4. Although the total setup time might be negative for slow slew rates (a valid input signal
5. For slew rates between the values listed in this table, the derating values may be obtained
6. These values are typically not subject to production test. They are verified by design and
7. Single-ended DQS requires special derating. The values in Table 30 are the DQS single-
–125
–14
–31
–54
–83
t
63
42
DH Δ
0
value to the derating value listed in Table 29.
t
of V
defined as the slew rate between the last crossing of V
V
shaded “V
the actual signal is later than the nominal slew rate line anywhere between shaded
“V
level to DC level is used for derating value (see Figure 72).
t
crossing of V
signal is defined as the slew rate between the last crossing of V
crossing of V
between shaded “DC level to V
(see Figure 73). If the actual signal is earlier than the nominal slew rate line anywhere
between shaded “DC to V
from the DC level to V
will not have reached V
signal is still required to complete the transition and reach V
by linear interpolation.
characterization.
ended slew rate derating with DQS referenced at V
t
t
and
(
t
DS nominal slew rate for a rising signal is defined as the slew rate between the last crossing
DH nominal slew rate for a rising signal is defined as the slew rate between the last
DS
DH
t
IL
DS
DH Derating Values with Differential Strobe
REF
(
b
AC
a
100
a
–13
–22
–34
–60
REF
t
t
67
2.0 V/ns
–5
) for DDR2-667. Table 32 provides the V
and
DH
0
DS Δ
(
and
) MAX. If the actual signal is always earlier than the nominal slew rate line between
DC
(
DC
a
) to AC region,” the slew rate of a tangent line to the actual signal from the AC
) for DDR2-533. Table 33 provides the V
t
–125
) and the first crossing of V
DH
t
REF
–14
–31
–54
–83
DH
t
63
42
DH Δ
0
IL
REF
(
b
a
DC
(
. Table 31 provides the V
DC
) for DDR2-400.
DQS, DQS# Differential Slew Rate
) to AC region,” use nominal slew rate for derating value (see Figure 71). If
(DC). If the actual signal is always later than the nominal slew rate line
112
–10
–22
–48
–88
) MAX and the first crossing of V
t
79
12
–1
1.8 V/ns
7
DS Δ
REF
–113
–176
–19
–42
–71
t
IH
75
54
12
–2
DH Δ
(
(
REF
DC
AC
) level is used for derating value (see Figure 74).
)/V
(
95
DC
124
t
–10
–36
–76
1.6 V/ns
t
91
24
19
11
DS and
2
DS Δ
IL
REF
) region,” the slew rate of a tangent line to the actual signal
(
AC
(
DC
–101
–164
) at the time of the rising clock transition), a valid input
–30
–59
t
87
66
24
10
–7
IH
DH Δ
) region,” use nominal slew rate for derating value
t
DH required is calculated by adding the data sheet
(
REF
Micron Technology, Inc., reserves the right to change products or specifications without notice.
AC
) MIN.
-based fully derated values for the DQ (
136
103
–24
–64
t
36
31
23
1.4 V/ns
14
2
DS Δ
REF
512Mb: x4, x8, x16 DDR2 SDRAM
-based fully derated values for the DQ (
–152
t
REF
–47
–89
–18
t
DS nominal slew rate for a falling signal is
REF
99
78
36
22
5
DH Δ
REF
-based fully derated values for the DQ
(
DC
and DQ referenced at the logic levels
148
115
REF
–12
–52
).
1.2 V/ns
t
48
43
35
26
14
Input Slew Rate Derating
DS Δ
t
DH nominal slew rate for a falling
(
DC
–140
) and the first crossing of
IH
111
–35
–77
t
90
48
34
17
–6
(
DH Δ
AC
IH
©2004 Micron Technology, Inc. All rights reserved.
(
)/V
DC
160
127
–40
) MIN and the first
IL
t
60
55
47
1.0 V/ns
38
26
0
DS Δ
(
AC
).
–128
123
102
–23
–65
t
60
46
29
DH Δ
6
172
139
–28
0.8 V/ns
t
72
67
59
50
38
12
t
DS Δ
DS
a
and
–116
t
135
114
–11
–53
t
DS
72
58
41
18
DH
a