NAND01GW4B2AN6E STMicroelectronics, NAND01GW4B2AN6E Datasheet - Page 18

• Manufacturer Part Number: NAND01GW4B2AN6E
• Description: IC FLASH 1GBIT 48TSOP
• Manufacturer: STMicroelectronics

Specifications of NAND01GW4B2AN6E

• Format - Memory: FLASH
• Memory Type: FLASH - Nand
• Memory Size: 1G (64M x 16)
• Interface: Parallel
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-TSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Speed: -

Signal descriptions
3.7
3.8
3.9
3.10
3.11
18/64
Power-Up Read Enable, Lock/Unlock Enable (PRL)
The Power-Up Read Enable, Lock/Unlock Enable input, PRL, is used to enable and disable
the lock mechanism. When PRL is High, V
If the Power-Up Read Enable, Lock/Unlock Enable input is not required, the PRL pin should
be left unconnected (Not Connected) or connected to V
Write Enable (W)
The Write Enable input, W, controls writing to the Command Interface, Input Address and
Data latches. Both addresses and data are latched on the rising edge of Write Enable.
During power-up and power-down a recovery time of 10µs (min) is required before the
Command Interface is ready to accept a command. It is recommended to keep Write Enable
high during the recovery time.
Write Protect (WP)
The Write Protect pin is an input that gives a hardware protection against unwanted program
or erase operations. When Write Protect is Low, V
program or erase operations.
It is recommended to keep the Write Protect pin Low, V
Ready/Busy (RB)
The Ready/Busy output, RB, is an open-drain output that can be used to identify if the P/E/R
Controller is currently active. When Ready/Busy is Low, V
operation is in progress. When the operation completes Ready/Busy goes High, V
The use of an open-drain output allows the Ready/Busy pins from several memories to be
connected to a single pull-up resistor. A Low will then indicate that one, or more, of the
memories is busy.
Refer to the
calculate the value of the pull-up resistor.
V
V
power supply for all operations (read, program and erase).
An internal voltage detector disables all functions whenever V
Table 22
program/erase during power-transitions.
Each device in a system should have V
widths should be sufficient to carry the required program and erase currents.
DD
DD
provides the power supply to the internal core of the memory device. It is the main
Supply Voltage
and
Section 11.1: Ready/Busy Signal electrical characteristics
Table
23) or 1.5V (for 1.8V devices) to protect the device from any involuntary
DD
decoupled with a 0.1µF capacitor. The PCB track
IH
, the device is in Block Lock mode.
IL
, the device does not accept any
IL
SS
, during power-up and power-down.
OL
.
, a read, program or erase
DD
NAND01G-B, NAND02G-B
is below V
for details on how to
LKO
(see
OH
.