M25P128-VME6TG NUMONYX, M25P128-VME6TG Datasheet - Page 27

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M25P128-VME6TG

Manufacturer Part Number
M25P128-VME6TG
Description
IC FLASH 128MBIT 50MHZ 8VDFPN
Manufacturer
NUMONYX
Series
Forté™r
Datasheet

Specifications of M25P128-VME6TG

Format - Memory
FLASH
Memory Type
FLASH
Memory Size
128M (16M x 8)
Speed
50MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-VDFPN
Cell Type
NOR
Density
128Mb
Access Time (max)
8ns
Interface Type
Serial (SPI)
Boot Type
Not Required
Address Bus
1b
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Package Type
VDFPN EP
Sync/async
Synchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8b
Number Of Words
16M
Supply Current
8mA
Mounting
Surface Mount
Pin Count
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
M25P128-VME6TGCT

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6.7
Read data bytes at higher speed (FAST_READ)
The device is first selected by driving Chip Select (S) Low. The instruction code for the Read
Data Bytes at Higher Speed (FAST_READ) instruction is followed by a 3-byte address (A23-
A0) and a dummy byte, each bit being latched-in during the rising edge of Serial Clock (C).
Then the memory contents, at that address, is shifted out on Serial Data Output (Q), each
bit being shifted out, at a maximum frequency f
The instruction sequence is shown in
The first byte addressed can be at any location. The address is automatically incremented
to the next higher address after each byte of data is shifted out. The whole memory can,
therefore, be read with a single Read Data Bytes at Higher Speed (FAST_READ)
instruction. When the highest address is reached, the address counter rolls over to
000000h, allowing the read sequence to be continued indefinitely.
The Read Data Bytes at Higher Speed (FAST_READ) instruction is terminated by driving
Chip Select (S) High. Chip Select (S) can be driven High at any time during data output. Any
Read Data Bytes at Higher Speed (FAST_READ) instruction, while an Erase, Program or
Write cycle is in progress, is rejected without having any effects on the cycle that is in
progress.
Figure 14. Read data bytes at higher speed (FAST_READ) instruction and data-out
S
C
D
Q
S
C
D
Q
sequence
0
7
32 33 34
1
6
High Impedance
2
Dummy Byte
5
Instruction
3
4
35
4
3
36 37 38 39 40 41 42 43 44 45 46
5
2
6
1
7
0
MSB
23
8
7
Figure
22 21
9 10
24 BIT ADDRESS
6
DATA OUT 1
5
14.
4
C
3
28 29 30 31
3
, during the falling edge of Serial Clock (C).
2
2
1
1
0
0
47
MSB
7
6
DATA OUT 2
5
4
3
2
1
0
MSB
7
AI04006
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