ISL62870HRUZ-T Intersil, ISL62870HRUZ-T Datasheet - Page 16

IC CTRLR VREG PWM DC/DC 16-TQFN

ISL62870HRUZ-T

Manufacturer Part Number
ISL62870HRUZ-T
Description
IC CTRLR VREG PWM DC/DC 16-TQFN
Manufacturer
Intersil
Datasheet

Specifications of ISL62870HRUZ-T

Pwm Type
Controller
Number Of Outputs
1
Frequency - Max
330kHz
Duty Cycle
100%
Voltage - Supply
3.3 V ~ 25 V
Buck
Yes
Boost
No
Flyback
No
Inverting
No
Doubler
No
Divider
No
Cuk
No
Isolated
No
Operating Temperature
-10°C ~ 100°C
Package / Case
16-UTQFN (16-µTQFN)
Frequency-max
330kHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISL62870HRUZ-T
Manufacturer:
M/A-COM
Quantity:
45
Part Number:
ISL62870HRUZ-T
Manufacturer:
INTERSIL
Quantity:
20 000
Company:
Part Number:
ISL62870HRUZ-T
Quantity:
3 000
Company:
Part Number:
ISL62870HRUZ-T
Quantity:
10
Ultra Thin Quad Flat No-Lead Plastic Package (UTQFN)
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
NX (b)
5
SEATING PLANE
SECTION "C-C"
INDEX AREA
0.05 C
0.10 C
2.20
2X
(DATUM B)
2X
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
6
0.90
1.40
PIN #1 ID
(DATUM A)
0.10 C
(A1)
A
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
0.10 C
0.50
L1
A1
For information regarding Intersil Corporation and its products, see www.intersil.com
N
10
BOTTOM VIEW
0.20
SIDE VIEW
C C
LAND PATTERN
TOP VIEW
16
1
1
e
1.80
3.00
2
2
D
e
0.40
C L
0.20
1.40
NX b
16X
NX L
A
C
0.40
TERMINAL TIP
0.10 M C A B
0.05 M C
B
E
5
L
ISL62870
L16.2.6x1.8A
NOTES:
10. For additional information, to assist with the PCB Land Pattern
1. Dimensioning and tolerancing conform to ASME Y14.5-1994.
2. N is the number of terminals.
3. Nd and Ne refer to the number of terminals on D and E side,
4. All dimensions are in millimeters. Angles are in degrees.
5. Dimension b applies to the metallized terminal and is measured
6. The configuration of the pin #1 identifier is optional, but must be
7. Maximum package warpage is 0.05mm.
8. Maximum allowable burrs is 0.076mm in all directions.
9. JEDEC Reference MO-255.
SYMBOL
16 LEAD ULTRA THIN QUAD FLAT NO-LEAD PLASTIC
PACKAGE
respectively.
between 0.15mm and 0.30mm from the terminal tip.
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
Design effort, see Intersil Technical Brief TB389.
A1
A3
Nd
Ne
L1
A
D
E
N
b
e
L
θ
0.45
0.15
2.55
1.75
0.35
0.45
MIN
0
-
MILLIMETERS
0.127 REF
NOMINAL
0.40 BSC
0.50
0.20
2.60
1.80
0.40
0.50
16
4
4
-
-
MAX
0.55
0.05
0.25
2.65
1.85
0.45
0.55
12
August 14, 2008
Rev. 4 8/06
NOTES
FN6708.0
5
2
3
3
4
-
-
-
-
-
-
-
-

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