ISL8103IRZ Intersil, ISL8103IRZ Datasheet - Page 12

• Manufacturer Part Number: ISL8103IRZ
• Description: IC CTRLR PWM BUCK 3PHASE 40-QFN
• Manufacturer: Intersil

Specifications of ISL8103IRZ

• Pwm Type: Voltage Mode
• Number Of Outputs: 1
• Frequency - Max: 1.5MHz
• Duty Cycle: 66.6%
• Voltage - Supply: 4.75 V ~ 12.6 V
• Buck: Yes
• Boost: No
• Flyback: No
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-VFQFN, 40-VFQFPN
• Frequency-max: 1.5MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

resistor divider (R
to VSEN pin to set the output voltage level as shown in
Figure 6. This method is good for generating voltages up to
2.3V (with the REF voltage set to 1.5V).
For this case, the output voltage can be obtained as shown
in Equation 4.
V
It is recommended to choose resistor values of less than
500Ω for R
voltage DC accuracy.
Voltage Regulation
In order to regulate the output voltage to a specified level, the
ISL8103 uses the integrating compensation network shown in
Figure 6. This compensation network insures that the steady
state error in the output voltage is limited only to the error in
the reference voltage (output of the DAC or the external
voltage reference) and offset errors in the OFS current
source, remote sense and error amplifiers. Intersil specifies
the guaranteed tolerance of the ISL8103 to include the
combined tolerances of each of these elements, except when
an external reference or voltage divider is used, then the
tolerances of these components has to be taken into account.
The ISL8103 incorporates an internal differential
remote-sense amplifier in the feedback path. The amplifier
removes the voltage error encountered when measuring the
output voltage relative to the controller ground reference
point, resulting in a more accurate means of sensing output
voltage. Connect the microprocessor sense pins to the
non-inverting input, VSEN, and inverting input, RGND, of the
remote-sense amplifier. The droop voltage, VDROOP, also
feeds into the remote-sense amplifier. The remote-sense
output, VDIFF, is therefore equal to the sum of the output
voltage, V
the inverting input of the error amplifier through an external
resistor.
The output of the error amplifier, V
sawtooth waveform to generate the PWM signals. The PWM
signals control the timing of the Internal MOSFET drivers
and regulate the converter output so that the voltage at FB is
equal to the voltage at REF. This will regulate the output
voltage to be equal to Equation 5. The internal and external
A third method for setting the output voltage is to use a
OUT
TABLE 1. ISL8103 DAC VOLTAGE SELECTION TABLE
=
REF1
V
0
0
1
1
REF
OUT
S1
, and the droop voltage. VDIFF is connected to
and R
⋅
(
--------------------------------- -
R
S1
P1
R
, R
P1
+
P1
R
S1
resistors in order to get better output
P1
) from the output terminal (V
)
+ −
REF0
V
12
0
1
0
1
OFS
COMP
–
V
DROOP
, is compared to the
0.600V
0.900V
1.200V
1.500V
VDAC
(EQ. 4)
OUT
)
ISL8103
circuitry that controls voltage regulation is illustrated in
Figure 6.
Load-Line (Droop) Regulation
In some high current applications, a requirement on a
precisely controlled output impedance is imposed. This
dependence of output voltage on load current is often
termed “droop” or “load line” regulation.
The Droop is an optional feature in the ISL8103. It can be
enabled by connecting ICOMP pin to DROOP pin as shown
in Figure 6. To disable it, connect the DROOP pin to IREF
pin.
As shown in Figure 6, a voltage, V
total current in all active channels, I
differential remote-sense amplifier. The resulting voltage at
the output of the remote-sense amplifier is the sum of the
output voltage and the droop voltage. As Equation 4 shows,
feeding this voltage into the compensation network causes
the regulator to adjust the output voltage so that it’s equal to
the reference voltage minus the droop voltage.
V
OUT
R
FIGURE 6. OUTPUT VOLTAGE AND LOAD-LINE
1
V
C
=
DROOP
EXTERNAL CIRCUIT
SUM
+
-
V
V
V
OUT
REF
OFS
R
+
+
-
-
2
REGULATION WITH OFFSET ADJUSTMENT
±
R
C
S1
V
1
OFST
C
DROOP
REF
ICOMP
COMP
VDIFF
VSEN
RGND
ISUM
IREF
REF
R
DAC
FB
P1
–
V
DROOP
ISL8103 INTERNAL CIRCUIT
DROOP
I
OFS
OUT
VID DAC
+
-
, feeds into the
ERROR AMPLIFIER
ISENSE
+
+
, proportional to the
-
-
AMP
REMOTE-SENSE
DIFFERENTIAL
AMPLIFIER
+
-
V
COMP
July 21, 2008
(EQ. 5)
FN9246.1