ISL6264CRZ Intersil, ISL6264CRZ Datasheet - Page 20

IC CORE CTRLR TWO-PHASE 40-QFN

ISL6264CRZ

Manufacturer Part Number
ISL6264CRZ
Description
IC CORE CTRLR TWO-PHASE 40-QFN
Manufacturer
Intersil
Datasheet

Specifications of ISL6264CRZ

Applications
Controller, AMD Mobile Turion™
Voltage - Input
5 ~ 24 V
Number Of Outputs
1
Voltage - Output
0.38 ~ 1.55 V
Operating Temperature
-10°C ~ 100°C
Mounting Type
Surface Mount
Package / Case
40-VFQFN, 40-VFQFPN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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The resultant NTC network resistor value is dependent on
the temperature and given by Equation 7:
For simplicity, the gain of V
G1, also dependent on the temperature of the NTC
thermistor (see Equation 8).
Therefore, the output of the droop amplifier divided by the
total load current can be expressed in Equation 10:
where R
the temperature coefficient of the copper. To achieve the
droop value independent from the temperature of the
inductor, it is equivalently expressed by Equation 11:
The non-inverting droop amplifier circuit has the gain
k
G
Therefore, the temperature characteristics of gain of Vn is
described in Equation 13:
For the G1 target = 0.76, the R
R
a desired G1, close to the feature specified in Equation 20.
The actual G1 at +25°C is 0.769. For different G1 and NTC
thermistor preference, the design file to generate the proper
value of R
node, labeled R
Equation 14.
So, R
R
required to achieve the load line. Setting Rdrp1 = 1k_1%,
then Rdrp2 is can be found using Equation 15:
R
G
DCR T ( )
R
G
k
G
Then, the individual resistors from each phase to the VSUM
Rs
R
droopamp
droopamp
series
n
1target
n
droop
drp2
1
1
1
T ( )
T ( )
T ( )
T ( )
network, we can then determine the droop amplifier gain
=
S
2 R
= 2610kΩ, and R
=
=
=
=
= 3650Ω. Once we know the attenuation of the R
(
is the desired gain of Vn over I
=
DROOP
1
(
------------------------------------------------------------ -
=
--------------------------------------- -
R
------------------------------------------------------ -
(
R
expressed as shown in Equation 12:
R
+
1
--------------------------------------------- - 1
DCR G1 25°C
G
ntc
seqv
n
series
DCR
=
series
0.00393*(T-25)
+
1
T ( )
, R
T ( )
R
2 R
0.00393*(T-25)
1
n
1
+
+
series
is the realized load line slope and 0.00393 is
T ( )
S1
25C
1t
R
R
--------------- -
R
+
+
DCR
-------------------
droop
arg
drp2
drp1
sequ
R
and R
R
(
ntc
2
, R
ntc
et
(
1
25
par
) R
+
+
par
S2
R
0.00393*(T-25)
)
(
)
, and R
1
par
= 11kΩ, R
N
par
)
in Figure 31, are then given by
+
G
⎞ R
20
to the V
0.00393*(T-25)
1t
ntc
arg
drp1
seqv
= 10kΩ with b = 4300,
et
seqv
DCR_EQU
is provided by Intersil.
OUT
)
= 1825Ω generates
. DCR/2.
) k
is defined by
droop
(EQ. 10)
(EQ. 12)
(EQ. 13)
(EQ. 14)
(EQ. 15)
(EQ. 11)
(EQ. 7)
(EQ. 8)
(EQ. 9)
S
and
ISL6264
Droop Impedance (R
specification, DCR = 0.0008Ω typical for a 0.36µH inductor,
Rdrp1 = 1kΩ and the attenuation gain (G1) = 0.77, Rdrp2 is
then:
Note, we choose to ignore the R
not add significant error.
These designed values in R
layout and coupling factor of the NTC to the inductor. As only
one NTC is required in this application, this NTC should be
placed as close to the Channel 1 inductor as possible and
PCB traces sensing the inductor voltage should be go
directly to the inductor pads.
Once the board has been laid out, some adjustments may
be required to adjust the full load droop voltage. This is fairly
easy and can be accomplished by allowing the system to
achieve thermal equilibrium at full load, and then adjusting
Rdrp2 to obtain the appropriate load line slope.
To see whether the NTC has compensated the temperature
change of the DCR, the user can apply full load current and
wait for the thermal steady state and see how much the
output voltage will deviate from the initial voltage reading. A
good compensation can limit the drift to 2mV. If the output
voltage is decreasing with temperature increase, that ratio
between the NTC thermistor value and the rest of the
resistor divider network has to be increased. The user
should follow the evaluation board value and layout of NTC
as much as possible to minimize engineering time.
The 2mV/A load line should be adjusted by Rdrp2 based on
maximum current, not based on small current steps like 10A,
as the droop gain might vary between each 10A steps.
Basically, if the max current is 40A, the required droop
voltage is 84mV. The user should have 40A load current on
and look for 84mV droop. If the drop voltage is less than
84mV, for example, 80mV. the new value will be calculated
by:
Do not let the mismatch get larger than 600Ω. To reduce the
mismatch, multiply both R
factor. The appropriate factor in the example is
1404/853 = 1.65. In summary, the predicted load line with
the designed droop network parameters based on the
design tool is shown in Figure 33.
R
R
drp2
drp2
=
=
84mV
--------------- - R
80mV
------------------------------------- 1
0.0008 0.769
2 R
(
droop
drp1
DROOP
+
R
drp2
⎞ 1kΩ
drp1
) = 0.002 (V/A) as per the AMD
n
) R
network are very sensitive to
and R
O
drp1
=
resistors because they do
5.62kΩ
drp2
by the appropriate
May 28, 2009
(EQ. 16)
(EQ. 17)
FN6359.3

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