MAX1329BETL+ Maxim Integrated Products, MAX1329BETL+ Datasheet - Page 63

• Manufacturer Part Number: MAX1329BETL+
• Description: IC DAS 12BIT 300KSPS 40-TQFN-EP
• Manufacturer: Maxim Integrated Products

Specifications of MAX1329BETL+

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The circuit in Figure 23 applies an external 3.0V power
supply to both DV
disable the internal charge pump through the CP/VM
Control register. The bypass switch between DV
AV
Figure 24 shows the charge pump enabled to supply
AV
through the CP/VM Control register. See the Charge-
Pump Component Selection section.
Figure 25 shows DV
the charge-pump output set to 3.0V. The charge pump
can draw high peak currents from DV
mum load. Select an appropriately sized bypass capac-
itor for DV
reduced by increasing CA
clock frequency.
The MAX1329/MAX1330 can be powered directly from
two alkaline cells, two silver oxide button cells, or a lithi-
um-coin cell. DV
requires 2.7V to 5.5V for proper operation. Save power
by running DV
AV
2.7V AV
2.7V. Power is saved during this time because the inter-
nal charge pump is off. Once the battery voltage drops
to 2.7V, open the bypass switch and enable the internal
charge pump as long as DV
2.7V. Following this procedure optimizes the battery life.
Figure 23. Power-Supply Circuit Using an External 3.0V Power
Supply for DV
12-/16-Bit DASs with ADC, DACs, DPIOs, APIOs,
Reference, Voltage Monitors, and Temp Sensor
DD
DD
DD
SUPPLY
POWER
0.1µF
. The charge-pump output voltage is set to 5.0V
can be either open or closed in this configuration.
by closing the internal bypass switch. Use the
DD
DD
voltage monitor to detect when it drops to
DD
DV
(≥ 10 times C
DD
DD
and AV
DGND
Applications Information
Running Directly Off Batteries
2.7V TO 3.6V
DD
Power-Supply Considerations
C1A C1B
DD
directly off the battery and shorting to
______________________________________________________________________________________
MAX1329
MAX1330
DD
and AV
requires 1.8V to 3.6V and AV
DD
AGND
is powered from a battery with
AV
VDD
DD
FLY
DD
RST1
RST2
DD
and/or the charge-pump
. To drive AV
). Supply ripple can be
is between 1.8V and
0.1µF
DD
INTERRUPT
RESET
under maxi-
V
DGND
DD
DD
µC
directly,
DD
0.1µF
and
DD
Figure 26 provides standard digital-interface connections
between the MAX1329/MAX1330 and a µC. The µC gen-
erates its own 32kHz clock for timekeeping and the
MAX1329/MAX1330 provide the high-frequency clock
required by the µC. See the Clock Control Register sec-
tion to program the CLKIO output and frequency and set
the ODLY bit to delay the turn-off time to enable the µC
time to go to sleep. During sleep, CLKIO becomes an
input and requires a weak pulldown resistor (≤1MΩ) to
minimize power dissipation. See the DPIO Setup and
DPIO Control registers to program DPIO1–DPIO4 as
wake-ups. Upon wake-up, the internal oscillator starts and
outputs to CLKIO. See the CP/VM Control Register sec-
tion to program the RST1 and RST2 as a reset or interrupt.
Figure 24. Power-Supply Circuit Using an External 3.0V Power
Supply for DV
Figure 25. Power-Supply Circuit Using a Battery for DV
Internal Charge Pump Set to 3.0V for AV
SUPPLY
POWER
C
DVDD
C
E1
DVDD
DD
DV
DV
DD
and Internal Charge Pump Set to 5V for AV
DGND
DD
DGND
Digital-Interface Connections
2.7V TO 3.6V
C1A C1B
MAX1329
MAX1330
1.8V TO 3.6V
C1A C1B
MAX1329
MAX1330
C
FLY
C
FLY
AGND
AGND
AV
AV
DD
5.0V
RST2
RST1
DD
3.0V
RST1
RST2
C
AVDD
C
DD
AVDD
INTERRUPT
INTERRUPT
RESET
RESET
V
V
DGND
DGND
DD
DD
µC
µC
DD
0.1µF
0.1µF
and
DD
63