DS1865T+T&R Maxim Integrated Products, DS1865T+T&R Datasheet

IC PON CONTROL TRI 28-TQFN

DS1865T+T&R

Manufacturer Part Number
DS1865T+T&R
Description
IC PON CONTROL TRI 28-TQFN
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS1865T+T&R

Applications
*
Mounting Type
Surface Mount
Package / Case
28-TQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
The DS1865 controls and monitors all the burst-mode
transmitter and video receiver biasing functions for a
passive optical network (PON) triplexer. It has an APC
loop with tracking-error compensation that provides the
reference for the laser driver bias current and a temper-
ature-indexed lookup table (LUT) that controls the mod-
ulation current. It continually monitors for high output
current, high bias current, and low and high transmit
power with its internal fast comparators to ensure that
laser shutdown for eye safety requirements are met with-
out adding external components. Six ADC channels
monitor V
monitor inputs (MON1–MON4) that can be used to meet
transmitter and video receive signal monitoring require-
ments. Two digital-to-analog converter (DAC) outputs
are available for biasing the video receiver channel, and
five digital I/O pins are present to allow additional moni-
toring and configuration.
Rev 0; 3/07
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
TOP VIEW
Optical Triplexers with GEPON, BPON, or GPON
Transceiver
FETG
TX-D
TX-F
GND
N.C.
BEN
V
CC
CC
, internal temperature, and four external
1
2
3
4
5
6
7
28
(5mm x 5mm x 0.8mm)
8
27
9
General Description
26
10
DS1865
TQFN
25
11
Pin Configuration
24
12
23
13
Applications
______________________________________________ Maxim Integrated Products
22
14
21
20
19
18
17
16
15
MOD
BIAS
V
GND
M4DAC
DAC1
MON4
CC
PON Triplexer Control and
o Meets GEPON, BPON, and GPON Timing
o Bias Current Control Provided by APC Loop with
o Modulation Current is Controlled by a
o Laser Power Leveling from -6dB to +0dB
o Two 8-Bit Analog Outputs, One is Controlled by
o Internal Direct-to-Digital Temperature Sensor
o Six Analog Monitor Channels: Temperature, V
o Five Digital I/O Pins for Additional Control and
o Comprehensive Fault Management System with
o Two-Level Password Access to Protect
o 120 Bytes of Password 1 Protected Nonvolatile
o 128 Bytes of Password 2 Protected Nonvolatile
o 128 Bytes of Nonvolatile Memory Located at A0h
o I
o Operating Voltage: 2.85V to 5.5V
o Operating Temperature Range: -40°C to +95°C
o Packaging: 28-Pin Lead-Free TQFN (5mm x 5mm
+Denotes lead-free package.
*EP = Exposed pad.
DS1865T+
DS1865T+T&R
Requirements for Burst-Mode Transmitters
Tracking-Error Compensation
Temperature-Indexed Lookup Table
MON4 Voltage for Video Amplifier Gain Control
MON1, MON2, MON3, and MON4
Monitoring Functions
Maskable Laser Shutdown Capability
Calibration Data
Memory
Memory in Main Device Address
Slave Address
Monitoring
x 0.8mm)
2
C-Compatible Interface for Calibration and
PART
Monitoring Circuit
-40°C to +95°C
-40°C to +95°C
TEMP RANGE
Ordering Information
PIN-PACKAGE
28 TQFN-EP*
(5mm x 5mm x 0.8mm)
28 TQFN-EP*
(5mm x 5mm x 0.8mm)
tape-and-reel
Features
CC
,
1

Related parts for DS1865T+T&R

DS1865T+T&R Summary of contents

Page 1

... GND x 0.8mm) 17 M4DAC DAC1 16 MON4 15 PART 13 14 DS1865T+ DS1865T+T&R +Denotes lead-free package. *EP = Exposed pad. ______________________________________________ Maxim Integrated Products Monitoring Circuit Features Ordering Information TEMP RANGE PIN-PACKAGE 28 TQFN-EP* -40°C to +95°C (5mm x 5mm x 0.8mm) 28 TQFN-EP* -40°C to +95°C (5mm x 5mm x 0.8mm) tape-and-reel , CC ...

Page 2

PON Triplexer Control and Monitoring Circuit ABSOLUTE MAXIMUM RATINGS Voltage Range on MON1–MON4, BEN, BMD, and TX-D Pins Relative to Ground.................-0. (subject to not exceeding +6V) Voltage Range SDA, SCL, D0–D3, and CC TX-F Pins ...

Page 3

ELECTRICAL CHARACTERISTICS (DAC1 and M4DAC +2.85V to +5.5V -40°C to +95°C, unless otherwise noted PARAMETER DAC Output Range DAC Output Resolution DAC Output Integral Nonlinearity DAC Output Differential Nonlinearity DAC Error DAC Temperature ...

Page 4

PON Triplexer Control and Monitoring Circuit ANALOG VOLTAGE MONITORING (V = 2.85V to 5.5V -40°C to +95°C, unless otherwise noted PARAMETER SYMBOL ∆VMON Input Resolution ∆V Supply Resolution Input/Supply Accuracy ( ...

Page 5

ELECTRICAL CHARACTERISTICS 2.85V to 5.5V -40°C to +95°C, timing referenced PARAMETER SCL Clock Frequency Clock Pulse-Width Low Clock Pulse-Width High Bus-Free Time Between STOP and START Condition ...

Page 6

PON Triplexer Control and Monitoring Circuit 3.3V +25°C, unless otherwise noted SUPPLY CURRENT vs. SUPPLY VOLTAGE 7.000 SDA = SCL = V CC 6.500 6.000 +95°C 5.500 5.000 4.500 +25°C -40°C 4.000 3.500 ...

Page 7

3.3V +25°C, unless otherwise noted MON1–MON4 INL 1.0 USING FACTORY-PROGRAMMED 0.8 FULL-SCALE VALUE OF 2.5V 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8 -1.0 0 0.5 MON1–MON4 INPUT VOLTAGE (V) V BMD 1.0 ...

Page 8

PON Triplexer Control and Monitoring Circuit PIN NAME 1 BEN Burst Enable Input. Triggers the sampling of the APC and quick-trip monitors. 2 TX-D Transmit Disable Input. Disables BIAS and MOD outputs. 3 TX-F Transmit Fault Output, Open Drain 4 ...

Page 9

V CC DS1865 MEMORY ORGANIZATION V CC SDA INTERFACE SCL ALARM/WARNING COMPARISON RESULTS/THRESHOLDS TABLE 01h (EEPROM) EEPROM PW1 USER MEMORY, ALARM TRAP 128 BYTES AT TABLE 02h (EEPROM) A0h SLAVE CONFIGURATION AND CALIBRATION ADDRESS V TABLE 03h ...

Page 10

PON Triplexer Control and Monitoring Circuit IN+ IN- BEN+ BEN- DIS SDA COMMUNICATION SCL FAULT OUTPUT TX-F DISABLE INPUT TX-D RECEIVER LOS LOSI D0 OPEN-DRAIN LOS OUTPUT D1 ADDITIONAL DIGITAL I Detailed Description The DS1865 ...

Page 11

The APC loop’s feedback is the monitor diode (BMD) current, which is converted to a voltage using an exter- nal resistor. The feedback voltage is compared bit scaleable voltage reference that determines the APC set point of ...

Page 12

PON Triplexer Control and Monitoring Circuit V POA INIT V MOD I BIAS I STEP BIAS SAMPLE Figure 1. Power-Up Timing TX BIAS OFF MOD OFF Figure 2. TX-D ...

Page 13

FIRST BEN LAST BURST'S BIAS DAC CODE BIAS SAMPLE QUICK-TRIP SAMPLE TIMES Figure 3. APC and Quick-Trip Alarm Sample Timing Updates to the TXP-HI, TXP-LO, and BIAS HI quick-trip alarms do not occur during the burst-enable low time. Any ...

Page 14

PON Triplexer Control and Monitoring Circuit The ADC results (after right shifting, if used) are com- pared to high alarm thresholds, low alarm thresholds, and the warning threshold after each conversion, and the corresponding alarms are set, which can be ...

Page 15

DETECTION OF TX-F FAULT TX-D OR TX-F RESET DETECTION OF TX-F FAULT Figure 5. TX-F Timing Table 4. TX Function of TX-D and Alarm Sources NONMASKED V > V TX-D CC POA TX-F ALARM No X Yes 0 ...

Page 16

PON Triplexer Control and Monitoring Circuit DETECTION OF FETG FAULT TX-D I BIAS V MOD FETG* *FETG DIR = 0 Figure 6. FETG/Modulation and Bias Timing (Fault Condition Detected) Table 5. FETG, MOD, and BIAS Outputs as a Function of ...

Page 17

SEE RECALL V POA POD HIGH NORMAL DRIVEN TO FETG IMPEDANCE OPERATION FETG DIR PRECHARGED RECALLED SEE VALUE *SEE = SHADOWED EEPROM Figure 7. Low-Voltage Hysteresis Example Five digital I/O pins are provided for additional ...

Page 18

PON Triplexer Control and Monitoring Circuit SLAVE ADDRESS A0h DEC HEX 0 0 00h AUXILLARY MEMORY EEPROM 7Fh 127 7F 128 80 80h 80h TABLE 01h TABLE 02h PW1 LEVEL ACCESS CONFIGURATION AND EEPROM CONTROL (120 BYTES) ...

Page 19

I The following terminology is commonly used to 2 describe I C data transfers. Master Device: The master device controls the slave devices on the bus. The master device generates SCL clock pulses and START and STOP conditions. Slave ...

Page 20

PON Triplexer Control and Monitoring Circuit SDA t BUF t LOW SCL t HD:STA STOP START NOTE: TIMING IS REFERENCED TO V AND V . IL(MAX) IH(MIN) 2 Figure Timing Diagram Communication Writing a ...

Page 21

Reading a Single Byte from a Slave: Unlike the write operation that uses the memory address byte to define where the data written, the read operation occurs at the present value of the memory address counter. To ...

Page 22

PON Triplexer Control and Monitoring Circuit Lower Memory Register Map This register map shows each byte/word in terms of the row the memory. The first byte in the row is located in memory at the hexadecimal ...

Page 23

Table 01h Register Map WORD 0 ROW ROW (HEX) NAME BYTE 0/8 <7> 80 PW1 EE EE <7> 88 PW1 EE EE <7> 90 PW1 EE EE <7> 98 PW1 EE EE <7> A0 PW1 EE EE <7> A8 PW1 ...

Page 24

PON Triplexer Control and Monitoring Circuit Table 02h Register Map WORD 0 ROW ROW (HEX) NAME BYTE 0/8 BYTE 1/9 <0> <8> <4> 80 CONFIG 0 MODE UPDATE <8> 88 CONFIG 1 CONFIG RATE <8> 90 SCALE 0 RESERVED <8> ...

Page 25

Table 03h Register Map WORD 0 ROW ROW (HEX) NAME BYTE 0/8 <8> 80 PW2 EE EE <8> 88 PW2 EE EE <8> 90 PW2 EE EE <8> 98 PW2 EE EE <8> A0 PW2 EE EE <8> A8 PW2 ...

Page 26

PON Triplexer Control and Monitoring Circuit Table 04h Register Map WORD 0 ROW ROW (HEX) NAME BYTE 0/8 <8> 80 LUT4 MOD <8> 88 LUT4 MOD <8> 90 LUT4 MOD <8> 98 LUT4 MOD <8> A0 LUT4 MOD <8> A8 ...

Page 27

Table 06h Register Map WORD 0 ROW ROW (HEX) NAME BYTE 0/8 <8> 80 LUT6 M4DAC <8> 88 LUT6 M4DAC <8> 90 LUT6 M4DAC <8> 98 LUT6 M4DAC ACCESS CODE <0> <1> Read Access All S ee each b i ...

Page 28

PON Triplexer Control and Monitoring Circuit AUX A0h Memory Register Map WORD 0 ROW ROW (HEX) NAME BYTE 0/8 <5> 00 AUX EE EE <5> 08 AUX EE EE <5> 10 AUX EE EE <5> 18 AUX EE EE <5> ...

Page 29

Lower Memory, Register 00h to 01h: Temp Alarm Hi Lower Memory, Register 04h to 05h: Temp Warn Hi FACTORY DEFAULT: 7FFFh READ ACCESS All WRITE ACCESS PW2 MEMORY TYPE: Nonvolatile (SEE) 6 00h, 04h 01h, 05h ...

Page 30

PON Triplexer Control and Monitoring Circuit Lower Memory, Register 08h to 09h: V Lower Memory, Register 0Ch to 0dh: V Lower Memory, Register 10h to 11h: MON1 Alarm Hi Lower Memory, Register 14h to 15h: MON1 Warn Hi Lower Memory, ...

Page 31

Lower Memory, Register 0Ah to 0Bh: V Lower Memory, Register 0Eh to 0Fh: V Lower Memory, Register 12h to 13h: MON1 Alarm Lo Lower Memory, Register 16h to 17h: MON1 Warn Lo Lower Memory, Register 1Ah to 1Bh: MON2 Alarm ...

Page 32

PON Triplexer Control and Monitoring Circuit Lower Memory, Register 60h to 61h: Temp Value POWER-ON VALUE 0000h READ ACCESS All WRITE ACCESS N/A MEMORY TYPE: Volatile 6 60h 61h 2 2 bit7 Signed two’s complement direct-to-temperature ...

Page 33

Lower Memory, Register 6Eh: Status POWER-ON VALUE x000 0x0x b READ ACCESS All WRITE ACCESS See Below MEMORY TYPE: Volatile Access N/A ALL FETG SOFT 6Eh STATUS FETG bit7 FETG STATUS: Reflects the active state of ...

Page 34

PON Triplexer Control and Monitoring Circuit Lower Memory, Register 6Fh: Update POWER-ON VALUE 00h READ ACCESS All WRITE ACCESS All + DS1865 Hardware MEMORY TYPE: Volatile 6Fh TEMP RDY V RDY CC bit7 Update of completed conversions. At power-on, these ...

Page 35

Lower Memory, Register 70h: Alarm 3 POWER-ON VALUE 10h READ ACCESS All WRITE ACCESS N/A MEMORY TYPE: Volatile 70h TEMP HI TEMP LO bit7 TEMP HI: High Alarm Status for Temperature Measurement (Default) Last measurement was equal to ...

Page 36

PON Triplexer Control and Monitoring Circuit Lower Memory, Register 71h: Alarm 2 POWER-ON VALUE 00h READ ACCESS All WRITE ACCESS N/A MEMORY TYPE: Volatile 71h MON3 HI MON3 LO bit7 MON3 HI: High Alarm Status for MON3 Measurement ...

Page 37

Lower Memory, Register 73h: Alarm 0 POWER-ON VALUE 00h READ ACCESS All WRITE ACCESS N/A MEMORY TYPE: Volatile 73h RESERVED RESERVED bit7 bit7:4 RESERVED BIAS MAX: Alarm Status for Maximum Digital Setting of I bit3 0 = (Default) The value ...

Page 38

PON Triplexer Control and Monitoring Circuit Lower Memory, Register 74h: Warn 3 POWER-ON VALUE 10h READ ACCESS All WRITE ACCESS N/A MEMORY TYPE: Volatile 74h TEMP HI TEMP LO bit7 TEMP HI: High Warning Status for Temperature Measurement ...

Page 39

Lower Memory, Register 75h: Warn 2 POWER-ON VALUE 00h READ ACCESS All WRITE ACCESS N/A MEMORY TYPE: Volatile 75h MON3 HI MON3 LO bit7 MON3 HI: High Warning Status for MON3 Measurement (Default) Last measurement was equal to ...

Page 40

PON Triplexer Control and Monitoring Circuit Lower Memory, Register 78h: DOUT POWER-ON VALUE Recalled from Table 02h, Register C0h READ ACCESS All WRITE ACCESS All MEMORY TYPE: Volatile 78h RESERVED RESERVED bit7 At power-on, these bits are defined by the ...

Page 41

Lower Memory, Register 7Bh to 7Eh: Password Entry (PWE) POWER-ON VALUE FFFF FFFFh READ ACCESS N/A WRITE ACCESS All MEMORY TYPE: Volatile 31 30 7Bh 7Ch 7Dh 7Eh ...

Page 42

PON Triplexer Control and Monitoring Circuit Table 01h, Register 80h to F7h: PW1 EEPROM POWER-ON VALUE 00h READ ACCESS PW1 WRITE ACCESS PW1 MEMORY TYPE Nonvolatile (EE) 80h-F7h EE EE bit7 EEPROM for PW1 level access. Table 01h, Register F8h: ...

Page 43

Table 01h, Register FAh: Alarm 1 POWER-ON VALUE 00h READ ACCESS All WRITE ACCESS PW1 MEMORY TYPE: Volatile FAh RESERVED RESERVED bit7 Layout is identical to Alarm 1 1. These bits are latched. They are cleared by power-down or a ...

Page 44

PON Triplexer Control and Monitoring Circuit Table 01h, Register FDh: Warn 2 POWER-ON VALUE 00h READ ACCESS All WRITE ACCESS PW1 MEMORY TYPE: Volatile FDh MON3 HI MON3 LO bit7 Layout is identical to Warn 2 1. These bits are ...

Page 45

Table 02h, Register 80h: Mode POWER-ON VALUE 1Fh READ ACCESS PW2 WRITE ACCESS PW2 MEMORY TYPE: Volatile 80h SEEB RESERVED bit7 SEEB (Default) Enables EEPROM writes to SEE bytes. bit7 1 = Disables EEPROM writes to SEE bytes ...

Page 46

PON Triplexer Control and Monitoring Circuit Table 02h, Register 81h: Tindex POWER-ON VALUE 00h READ ACCESS PW2 WRITE ACCESS PW2 and (AEN = 0) MEMORY TYPE Volatile 81h bit7 Holds the calculated index based on the ...

Page 47

Table 02h, Register 84h: Vindex FACTORY DEFAULT 00h READ ACCESS PW2 WRITE ACCESS PW2 and (AEN = 0) MEMORY TYPE Volatile 7 6 84h 2 2 bit7 Holds the calculated index based on the MON4 voltage measurement. This index is ...

Page 48

PON Triplexer Control and Monitoring Circuit Table 02h, Register 87h: Device VER FACTORY DEFAULT Device Version READ ACCESS PW2 WRITE ACCESS N/A MEMORY TYPE ROM 87h bit7 Hardwired connections to show device version. Table 02h, Register 88h: Update Rate FACTORY ...

Page 49

Table 02h, Register 89h: Config FACTORY DEFAULT 00h READ ACCESS PW2 WRITE ACCESS PW2 MEMORY TYPE: Nonvolatile (SEE) 89h FETG DIR TX-F EN bit7 Configure the memory location and the polarity of the digital outputs. FETG DIR: Chooses the direction ...

Page 50

PON Triplexer Control and Monitoring Circuit Table 02h, Register 8Bh: MOD Ranging FACTORY DEFAULT: 00h READ ACCESS PW2 WRITE ACCESS PW2 MEMORY TYPE: Nonvolatile (SEE) 8Bh RESERVED RESERVED bit7 The lower nibble of this byte controls the full-scale range of ...

Page 51

Table 02h, Register 8Dh: Comp Ranging FACTORY DEFAULT: 00h READ ACCESS PW2 WRITE ACCESS PW2 MEMORY TYPE: Nonvolatile (SEE) 8Dh RESERVED BIAS 2 bit7 The upper nibble of this byte controls the Full-Scale range of the Quick-Trip monitoring for BIAS. ...

Page 52

PON Triplexer Control and Monitoring Circuit Table 02h, Register 8Eh: Right Shift 1 FACTORY DEFAULT: 00h READ ACCESS PW2 WRITE ACCESS PW2 MEMORY TYPE: Nonvolatile (SEE) 8Eh RESERVED MON1 2 bit7 Allows for right-shifting the final answer of MON1 and ...

Page 53

Table 02h, Register 92h to 93h: V Scale CC Table 02h, Register 94h to 95h: MON1 Scale Table 02h, Register 96h to 97h: MON2 Scale Table 02h, Register 98h to 99h: MON3 Scale Table 02h, Register 9Ah to 9Bh: MON4 ...

Page 54

PON Triplexer Control and Monitoring Circuit Table 02h, Register ACh to ADh: Reserved FACTORY DEFAULT: 0000 0000h READ ACCESS PW2 WRITE ACCESS PW2 MEMORY TYPE: Nonvolatile (SEE) These registers are reserved. Table 02h, Register AEh to AFh: Internal Temp Offset ...

Page 55

Table 02h, Register B4h to B7h: PW2 FACTORY DEFAULT FFFF FFFFh READ ACCESS N/A WRITE ACCESS PW2 MEMORY TYPE Nonvolatile (SEE B4h B5h B6h B7h 2 ...

Page 56

PON Triplexer Control and Monitoring Circuit Table 02h, Register B8h: FETG Enable FACTORY DEFAULT 00h READ ACCESS PW2 WRITE ACCESS PW2 MEMORY TYPE: Nonvolatile (SEE) B8h TEMP bit7 Configures the maskable interrupt for the FETG pin. ...

Page 57

Table 02h, Register B9h: FETG Enable FACTORY DEFAULT 00h READ ACCESS PW2 WRITE ACCESS PW2 MEMORY TYPE: Nonvolatile (SEE) B9h HTXP EN LTXP EN bit7 Configures the maskable interrupt for the FETG pin. HTXP EN: Enables/disables active interrupts on the ...

Page 58

PON Triplexer Control and Monitoring Circuit Table 02h, Register BAh: TX-F Enable FACTORY DEFAULT 00h READ ACCESS PW2 WRITE ACCESS PW2 MEMORY TYPE: Nonvolatile (SEE) BAh TEMP bit7 Configures the maskable interrupt for the TX-F pin. ...

Page 59

Table 02h, Register BBh: TX-F Enable FACTORY DEFAULT 00h READ ACCESS PW2 WRITE ACCESS PW2 MEMORY TYPE: Nonvolatile (SEE) BBh HTXP EN LTXP EN bit7 Configures the maskable interrupt for the Tx-F pin. HTXP EN: Enables/disables active interrupts on the ...

Page 60

PON Triplexer Control and Monitoring Circuit Table 02h, Register BCh: HTXP FACTORY DEFAULT: 00h READ ACCESS PW2 WRITE ACCESS PW2 MEMORY TYPE: Nonvolatile (SEE BCh 2 2 bit7 Fast-comparison DAC threshold adjust for high transmit power. This value ...

Page 61

Table 02h, Register C0h: DPU FACTORY DEFAULT 00h READ ACCESS PW2 WRITE ACCESS PW2 MEMORY TYPE: Nonvolatile (SEE) C0h RESERVED RESERVED bit7 Controls the power-on values for D3, D2, D1, and D0 output pins and mux and invertion of the ...

Page 62

PON Triplexer Control and Monitoring Circuit Table 02h, Register C5h to C6h: Reserved FACTORY DEFAULT: 0000 0000h READ ACCESS PW2 WRITE ACCESS PW2 MEMORY TYPE: Nonvolatile (SEE) These registers are reserved. Table 02h, Register C7h: M4 LUT Cntl FACTORY DEFAULT ...

Page 63

Table 02h, Register FAh: MAN_CNTL FACTORY DEFAULT: 00h READ ACCESS PW2 WRITE ACCESS PW2 and (Bias- MEMORY TYPE: Volatile FAh RESERVED RESERVED bit7 When BIAS-EN (Table 02h, Register 80h) is written to zero, bit zero of this byte ...

Page 64

PON Triplexer Control and Monitoring Circuit Table 03h, Register 80h to FFh: PW2 EEPROM FACTORY DEFAULT 00h READ ACCESS PW2 WRITE ACCESS PW2 MEMORY TYPE: Nonvolatile (EE) 80h-FFh EE EE bit7 PW2 protected EEPROM. Table 04h, Register 80h to C7h: ...

Page 65

Table 05h, Register 80h to A3h: APC Tracking Error LUT (APC REF) FACTORY DEFAULT 00h READ ACCESS PW2 WRITE ACCESS PW2 MEMORY TYPE: Nonvolatile (EE 80h-A3h 2 2 bit7 The Tracking Error LUT is set of registers assigned ...

Page 66

... Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 66 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2007 Maxim Integrated Products is a registered trademark of Dallas Semiconductor Corporation ...

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