MC33780EG Freescale Semiconductor, MC33780EG Datasheet - Page 22

• Manufacturer Part Number: MC33780EG
• Description: IC DBUS MASTER DUAL DIFF 16-SOIC
• Manufacturer: Freescale Semiconductor

Specifications of MC33780EG

• Applications: *
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (0.300", 7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

22
33780
FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
LOGIC BLOCK DIAGRAM DESCRIPTION
the major logic blocks in the IC.
SPI
interface provides two-way communications between the IC
and an MCU. The MCU can write to registers that control the
operation of the IC and read back the conditions in the IC
using the SPI. It can also write data to be sent out on the
DBUS and read data that was returned on the DBUS. The
register pointer and bit pointer are used to control which
registers and bits are being written to and read from using the
SPI. Its operation is described in detail in the section entitled
SPI Communications on page
Figure
The SPI is a standard serial peripheral interface. This
SCLK
MISO
MOSI
18, Logic Block Diagram, shows a block diagram of
CLK_VCO0
CS
CLK_VCO1
INT
RST
CLK
CLK
19.
Clock Select and Divider
SPI & Registers
Clock Select and Divider
register pointer
bit pointer
status regs
control regs
enable regs
poly regs
seed regs
length regs
SS ctrl regs
SS offset regs
SS Up/Dwn regs
Channel 0
Interrupt
SPI XFER
Channel 1
Figure 18. Logic Block Diagram
Bit Clock 0
Bit Clock 1
RX0 Status
TX0 Data
TX0 Status
TX1Data
TX1 Status
RX1 Data
RX1 Status
RX0 Data
REGISTERS
receive types. They are written and read using the SPI
interface and are affected by events in the IC. Detailed
descriptions of their operation and use can be found
throughout later sections of this data sheet.
INTERRUPT
purpose of the Interrupt is to quickly inform the MCU when
data has been received via the DBUS or when the DBUS
transmit buffer is empty. The
level on the pin low. The internal pull-up current or an external
resistor to V
that other ICs can be connected to the interrupt pin on the
The register set consists of control, status, transmit, and
The Interrupt block controls the
CC
RX Buffer
RX Buffer
RX Buffer
RX Buffer
TX Buffer
TX Buffer
TX Buffer
TX Buffer
RX Buffer
RX Buffer
RX Buffer
RX Buffer
TX Buffer
TX Buffer
TX Buffer
TX Buffer
RX FIFO
RX FIFO
TX FIFO
TX FIFO
is used to pull this pin high. This is done so
Analog Integrated Circuit Device Data
INT
output can only drive the
Freescale Semiconductor
INT
CH0
CH1
output pin. The main
CH0 Enable
CH1 Enable