TMP86C993XB Toshiba, TMP86C993XB Datasheet - Page 159

• Manufacturer Part Number: TMP86C993XB
• Description: EMULATION CHIP FOR TMP86F SSOP
• Manufacturer: Toshiba

Specifications of TMP86C993XB

• Accessory Type: Adapter
• For Use With/related Products: TMP86F SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

14.7
14.8
14.8.1
14.8.2
SEI interrupts.
when the SESR<SEF> flag is set.
The TMP86FH92DMG is provided with the SEI interrupt channels 0 and 1 (INTSEI0 and INTSEI1) for processing
INTSEI0 generates an interrupt pulse when the SESR<MODF> flag is set. INTSEI1 generates an interrupt pulse
The SEI can detect the following three types of system errors:
Interrupt Generation
SEI System Errors
・ Mode fault error: A mode fault error occurs if the SS pin of the master device is driven low.
・ Write collision error: A write collision error occurs if data is written to the SEDR register while a transfer is
・ Overflow error: An overflow error occurs if new data is received in a slave device before the previous data
Because the SEDR register is not configured as dual-buffers for sending data, a write to the SEDR register directly
results in writing to the SEI shift register. Therefore, writing to the SEDR register while a transfer is in progress
causes a write collision error.
not be written to the shift register. Because slaves cannot control the timing at which the master starts a transfer,
write collision errors normally occur on slave devices. The master has the right to perform a transfer at any time,
and thus write collision errors do not normally occur on the master side. However, both master and slave SEI
devices are capable of detecting write collision errors.
that at which the slave processes the transferred data. More specifically, a write collision error occurs if the slave
transfers a new value to the SEDR register when the master has already started a shift cycle for the next byte.
able to keep up with transfer from the master. This occurs when the master shifts out data faster than can be
processed by the slave. The SEI module uses the SESR<SOVF> flag to detect an overflow error.
A write collision error occurs if an attempt is made to write to the SEDR register while data is being transferred.
In no case is data transfer stopped in the middle, so that the write data which caused a write collision error will
A write collision error tends to occur on a slave device when the master shifts out data at a speed faster than
The transfer bit rate on the SEI bus is determined by the master. At higher bit rates, a slave device may not be
The SOVF flag is set if the following conditions are both met:
When the SOVF flag is set, the SEDR register is overwritten with a new data byte.
Write collision error
Overflow error
in progress.
is read. "
Note:Please carefully examine the communication processing routine and communication rate when designing
・ When the SEI module is set as a slave
・ When the previous data byte remains to be read after a new data byte has been received
Table 14-6 SEI Interrupt
SEI interrupt channe0 (INTSEI0)
SEI interrupt channel 1 (INTSEI1)
your application system.
Page 145
Generates an interrupt pulse when the MODF flag is setI
Generates an interrupt pulse when the SEF flag is setI
TMP86FH92DMG