TMP86C993XB Toshiba, TMP86C993XB Datasheet - Page 66

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TMP86C993XB

Manufacturer Part Number
TMP86C993XB
Description
EMULATION CHIP FOR TMP86F SSOP
Manufacturer
Toshiba
Datasheet

Specifications of TMP86C993XB

Accessory Type
Adapter
For Use With/related Products
TMP86F SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
5.1
P0 (P07 to P00) Port (High Current)
5.1
UART1 input/output, timer counter input/output and serial PROM mode control input. When using this port as serial
expansion interface output or UART1 output, set the output latch to 1. When using this port as a port output, the output
latch data (P0DR) is output to the P0 port.
respectively.
P0OUTCR register.
timer counter input, set the P0OUTCR register's corresponding bit to 0 after setting the P0DR to 1. The P0 port has
independent data input registers. To inspect the output latch status, read the P0DR register. To inspect the pin status,
read the P0PRD register.
PROM Mode Setting".
P0 (P07 to P00) Port (High Current)
The P0 port is an 8-bit input/output port shared with external interrupt input, serial expansion interface input/output,
When reset, the output latch (P0DR) and the push-pull control register (P0OUTCR) are initialized to 1 and 0,
The P0 port allows its output circuit to be selected between N-channel open-drain output or push-pull output by the
The P0 port has programmable internal Pull-up resistance to be controlled by P0PUCR registers.
When using this port as a port input, external interrupt input, serial expansion interface input, UART1 input and
In the serial PROM mode, P01 pin used as a BOOT/RXD1 pin, P00 pin used as a TXD1 pin. For details, see "Serial
Data input (P0PRD)
Data output (P0DR)
Data input (P0DR)
P0OUTCRi input
Control output
Control input
P0OUTCRi
P0PUCRi
OUTEN
STOP
Output latch
D
D
Q
Q
Figure 5-2 P0 Port
Page 52
VDD
P0i
Note: i = 7 to 0
TMP86FH92DMG

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