KSZ8851-16MLL-EVAL Micrel Inc, KSZ8851-16MLL-EVAL Datasheet - Page 33

• Manufacturer Part Number: KSZ8851-16MLL-EVAL
• Description: BOARD EVALUATION KSZ8851-16MLL
• Manufacturer: Micrel Inc
• Series: LinkMD®r

Specifications of KSZ8851-16MLL-EVAL

• Main Purpose: Interface, Ethernet Controller (PHY and MAC)
• Embedded: No
• Utilized Ic / Part: KSZ8851-16MLL
• Primary Attributes: 1 Port, 100BASE-TX/10BASE-T
• Secondary Attributes: 8/16-Bit Interface, LinkMD Cable Diagnostics
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 576-3292

Micrel, Inc.
KSZ8851-16MLL/MLLI
CPU Interface I/O Registers
The KSZ8851-16MLL provides an SRAM-like asynchronous bus interface for the CPU to access its internal I/O registers.
I/O registers serve as the address that the microprocessor uses when communicating with the device. This is used for
configuring operational settings, reading or writing control, status information, and transferring packets. The KSZ8851-
16MLL can be programmed to interface with either Big-Endian or Little-Endian processor.
I/O Registers
The following I/O Space Mapping Tables apply to 8 or 16-bit bus interface. Depending upon the bus mode selected, each
I/O access can be performed the following operations:
In 8-bit bus mode, there are 256 address locations which is based on SD[7:0] for address when CMD=1. The SD[7:0] is
for data when CMD=0.
In 16-bit bus mode, there are 64 address locations which is based on SD[7:2] ([1:0] is “don’t care”) for address and
SD[15:12] for Byte Enable BE[3:0] (either one byte or two bytes) when CMD=1. The SD[15:0] is for data when CMD=0.
August 2009
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M9999-083109-2.0