MCP1631RD-MCC1 Microchip Technology, MCP1631RD-MCC1 Datasheet - Page 86
MCP1631RD-MCC1
Manufacturer Part Number
MCP1631RD-MCC1
Description
REFERENCE DESIGN FOR MCP1631HV
Manufacturer
Microchip Technology
Type
Battery Managementr
Datasheets
1.MCP1631VHVT-330EST.pdf
(34 pages)
2.MCP1631HV-330EST.pdf
(54 pages)
3.MCP1631RD-MCC2.pdf
(20 pages)
4.MCP1631RD-MCC2.pdf
(328 pages)
5.MCP1631RD-MCC1.pdf
(28 pages)
Specifications of MCP1631RD-MCC1
Main Purpose
Power Management, Battery Charger
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
MCP1631HV, PIC16F883
Primary Attributes
1 ~ 2 Cell- Li-Ion, 1 ~ 4 Cell- NiCd/NiMH
Secondary Attributes
Status LEDs
Supported Devices
MCP1631HV, PIC16F883 Device Type
Tool / Board Applications
Power Management-Battery Management
Development Tool Type
Reference Design
Input Voltage
5.5 V to 16 V
Product
Power Management Modules
Mcu Supported Families
MCP1631HV/PIC16F883 Family
Silicon Manufacturer
Microchip
Silicon Core Number
MCP1631HV
Kit Application Type
Reference Design
Application Sub Type
Battery Charger
Kit Contents
Board Only
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
MCP1631HV, PIC16F883
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- MCP1631VHVT-330EST PDF datasheet
- MCP1631HV-330EST PDF datasheet #2
- MCP1631RD-MCC2 PDF datasheet #3
- MCP1631RD-MCC2 PDF datasheet #4
- MCP1631RD-MCC1 PDF datasheet #5
- Current page: 86 of 328
- Download datasheet (6Mb)
PIC16F882/883/884/886/887
FIGURE 8-2:
FIGURE 8-3:
DS41291F-page 84
FixedRef
CV
C1R
FixedRef
CV
C2R
REF
REF
SEL
SEL
C12IN0-
C12IN1-
C12IN2-
C12IN3-
C2IN+
C12IN0-
C12IN1-
C12IN2-
C12IN3-
C1IN+
C2CH<1:0>
C1CH<1:0>
0
1
0
1
MUX
Note 1:
MUX
Note 1:
COMPARATOR C1 SIMPLIFIED BLOCK DIAGRAM
COMPARATOR C2 SIMPLIFIED BLOCK DIAGRAM
C1V
C1R
2:
3:
C2V
C2R
2:
3:
0
1
2
3
0
1
2
3
0
1
REF
2
MUX
0
1
REF
MUX
2
MUX
When C1ON = 0, the C1 comparator will produce a ‘0’ output to the XOR Gate.
Q1 and Q3 are phases of the four-phase system clock (F
Q1 is held high during Sleep mode.
MUX
When C2ON = 0, the C2 comparator will produce a ‘0’ output to the XOR Gate.
Q1 and Q3 are phases of the four-phase system clock (F
Q1 is held high during Sleep mode.
C2V
C2V
C1V
C1V
IN
IN
+
IN
IN
-
-
+
C2
C2ON
+
-
C1
C1ON
C2POL
(1)
C1POL
(1)
From Timer1
Q3*RD_CM2CON0
Clock
Q3*RD_CM1CON0
Q1
Q1
D
C2OUT
D
EN
Reset
D
EN
C1OUT
Reset
Q
Q
C2SYNC
Q
D
EN
C2POL
D
EN
CL
OSC
0
1
C1POL
OSC
MUX
CL
Q
Q
).
).
© 2009 Microchip Technology Inc.
To Timer1 Gate, SR Latch,
PWM Logic, and other
peripherals
RD_CM2CON0
RD_CM1CON0
C1OUT (to SR Latch)
To PWM Logic
SYNCC2OUT
Data Bus
Set C2IF
Data Bus
Set C1IF
To
To
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