WAVEVSN BRD 4.4 National Semiconductor, WAVEVSN BRD 4.4 Datasheet - Page 20

• Manufacturer Part Number: WAVEVSN BRD 4.4
• Description: BOARD INTERFACE DIGITAL HI SPD
• Manufacturer: National Semiconductor
• Series: WaveVisionr

Specifications of WAVEVSN BRD 4.4

• Main Purpose: Interface, Data Capture
• Embedded: Yes, ASIC
• Primary Attributes: ADC & DAC Evaluation
• Secondary Attributes: Graphical User Interface, USB Interface
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Utilized Ic / Part: -

11.1 Waveform Type
11.1.1
11.1.2
The predefined waveform types (sine, sineX/X, sawtooth, pulse and triangle) have the following
control panel.
Clock Selection
The “Clock Selection” section allows selection of the clock frequency used to send data
to the DAC. The valid values of “Clock Hz” are 100MHz divided by even integer values
from 4 to 8192 (this frequency range is shown under the entry box); the software adjusts
the entry to the nearest valid value. The “Conv Rate Hz” display is the conversion rate at
which the DAC receives and outputs a new data word, which is the clock frequency
divided by 20 for many of our serial DACs, but can very with the DAC type.
Waveform Selection
The “Waveform Selection” options allow selection of the waveform type and the
frequency of the waveform (note that the allowable range of the frequency is given below
the “Freq Hz” entry box; the range varies depending on the “Clock Hz” value selected).
The “Samples/Cycle” display is the integer number of data samples/waveform cycle and
is equal to the “Conv Rate Hz” divided by the “Freq Hz” value. Note that at high waveform
frequencies the samples/cycle decreases to a small number and gives a poorer
representation of the waveform. Note also that the waveform frequency value is forced to
the closest actual value; the selection of high frequency values is limited because the
samples/cycle is an integer.
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