DS26528DK Maxim Integrated Products, DS26528DK Datasheet - Page 149
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DS26528DK
Manufacturer Part Number
DS26528DK
Description
KIT DESIGN FOR DS26528
Manufacturer
Maxim Integrated Products
Datasheet
1.DS26528G.pdf
(276 pages)
Specifications of DS26528DK
Main Purpose
Telecom, Framer and Line Interface Units (LIUs)
Utilized Ic / Part
G575DS26528
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 7: RCLK Invert (RCLKINV).
Bit 6: RSYNC Invert (RSYNCINV).
Bit 5: H.100 SYNC Mode (H100EN). See Section
Bit 4: RSYSCLK Mode Select (RSCLKM).
Bit 3: RSYNC Multiframe Skip Control (RSMS) (T1 Mode Only). Useful in framing format conversions from D4 to
ESF. This function is not available when the receive-side elastic store is enabled. RSYNC must be set to output
multiframe pulses.
Bit 2: RSYNC I/O Select (RSIO). (Note: This bit must be set to zero when elastic store is disabled) The default
value for this bit is a logic 1 so that the default state of RSYNC is as an input.
Bit 1: RSYNC Mode Select 2 (RSMS2).
In E1 mode, RSMS2 also selects which multiframe signal is available at the RMSYNC pin, regardless of the
configuration for RSYNC. When RSMS2 = 0, RMSYNC outputs CAS multiframe boundaries; when RSMS2 = 1,
RMSYNC outputs CRC-4 multiframe boundaries.
Bit 0: RSYNC Mode Select 1 (RSMS1). Selects frame or multiframe pulse when RSYNC pin is in output mode. In
input mode (elastic store must be enabled) multiframe mode is only useful when receive-signaling reinsertion is
enabled.
0 = no inversion
1 = invert RCLK as input
0 = no inversion
1 = invert RSYNC as either input or output
0 = normal operation
1 = RSYNC and TSSYNCIO signals are shifted
0 = if RSYSCLK is 1.544MHz
1 = if RSYSCLK is 2.048MHz or IBO enabled
0 = RSYNC will output a pulse at every multiframe
1 = RSYNC will output a pulse at every other multiframe
0 = RSYNC is an output
1 = RSYNC is an input (only valid if elastic store enabled)
T1 Mode: RSYNC pin must be programmed in the output frame mode.
E1 Mode: RSYNC pin must be programmed in the output multiframe mode.
0 = frame mode
1 = multiframe mode
RCLKINV
RCLKINV
7
0
0 = do not pulse double-wide in signaling frames
1 = do pulse double-wide in signaling frames
0 = RSYNC outputs CAS multiframe boundaries
1 = RSYNC outputs CRC-4 multiframe boundaries
RSYNCINV
RSYNCINV
RIOCR
Receive I/O Configuration Register
084h + (200h x n): where n = 0 to 7, for Ports 1 to 8
6
0
H100EN
H100EN
5
0
8.8.3
RSCLKM
RSCLKM
149 of 276
4
0
for more information.
RSMS
—
3
0
DS26528 Octal T1/E1/J1 Transceiver
RSIO
RSIO
2
1
RSMS2
RSMS2
1
0
RSMS1
RSMS1
0
0
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