DS26528DK Maxim Integrated Products, DS26528DK Datasheet - Page 31

• Manufacturer Part Number: DS26528DK
• Description: KIT DESIGN FOR DS26528
• Manufacturer: Maxim Integrated Products

Specifications of DS26528DK

• Main Purpose: Telecom, Framer and Line Interface Units (LIUs)
• Utilized Ic / Part: G575DS26528
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Figure 8-2. Device Interrupt Information Flow Diagram
Receive Remote Alarm Indication Clear
Receive Alarm Condition Clear
Receive Loss of Signal Clear
Receive Loss of Frame Clear
Receive Remote Alarm Indication
Receive Alarm Condition
Receive Loss of Signal
Receive Loss of Frame
Receive Signal All Ones
Receive Signal All Zeros
Receive CRC-4 Multiframe
Receive Align Frame
Loss of Receive Clock Clear/Loss of Receive Clock Clear
Spare Code Detected Condition Clear
Loop-Down Code Clear/V52 Link Clear
Loop-Up Code Clear/Receive Distant MF Alarm Clear
Loss of Receive Clock/Loss of Receive Clock
Spare Code Detect
Loop-Down Detect/V52 Link Detect
Loop-Up Detect/Receive Distant MF Alarm Detect
Receive Elastic Store Full
Receive Elastic Store Empty
Receive Elastic Store Slip
Receive Signaling Change of State (Enable in RSCSE1:4)
One-Second Timer
Timer
Receive Multiframe
Receive FIFO Overrun
Receive HDLC Opening Byte
Receive Packet End
Receive Packet Start
Receive Packet High Watermark
Receive FIFO Not Empty
Receive RAI-CI
Receive AIS-CI
Receive SLC-96 Alignment
Receive FDL Register Full
Receive BOC Clear
Receive BOC
Transmit Elastic Store Full
Transmit Elastic Store Empty
Transmit Elastic Store Slip
Transmit SLC-96 Multiframe
Transmit Pulse Density Violation/Transmit Align Frame
Transmit Multiframe
Loss of Transmit Clock Clear
Loss of Transmit Clock
Transmit FDL Register Empty
Transmit FIFO Underrun
Transmit Message End
Transmit FIFO Below Low Watermark
Transmit FIFO Not Full Set
—
—
Loss of Frame
Loss of Frame Synchronization
Jitter Attenuator Limit Trip Clear
Open-Circuit Detect Clear
Short-Circuit Detect Clear
Loss of Signal Detect Clear
Jitter Attenuator Limit Trip
Open-Circuit Detect
Short-Circuit Detect
Loss of Signal Detect
BERT Bit-Error Detected
BERT Bit Counter Overflow
BERT Error Counter Overflow
BERT Receive All Ones
BERT Receive All Zeros
BERT Receive Loss of Synchronization
BERT in Synchronization
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INTERRUPT MASK
INTERRUPT
REGISTERS
REGISTERS
STATUS
DS26528 Octal T1/E1/J1 Transceiver
DRAWING LEGEND:
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0
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REGISTER NAME
REGISTER NAME