ISL6310EVAL1Z Intersil, ISL6310EVAL1Z Datasheet - Page 21

• Manufacturer Part Number: ISL6310EVAL1Z
• Description: EVALUATION BOARD FOR ISL6310
• Manufacturer: Intersil

Specifications of ISL6310EVAL1Z

• Main Purpose: DC/DC, Step Down
• Outputs And Type: 1, Non-Isolated
• Voltage - Output: 1.5V
• Current - Output: 60A
• Voltage - Input: 5 ~ 12V
• Regulator Topology: Buck
• Frequency - Switching: 400kHz
• Board Type: Fully Populated
• Utilized Ic / Part: ISL6310
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power - Output: -

per-channel switching frequency. The values of the
compensation components depend on the relationships of f
to the L-C pole frequency and the ESR zero frequency. For
each of the following three, there is a separate set of
equations for the compensation components.
Case 3:
In Equation 28, L is the per-channel filter inductance divided by
the number of active channels; C is the sum total of all output
capacitors; ESR is the equivalent series resistance of the bulk
output filter capacitance; and V
sawtooth signal amplitude as described in the “Electrical
Specifications” on page 5.
Once selected, the compensation values in Equation 28
assure a stable converter with reasonable transient
performance. In most cases, transient performance can be
improved by making adjustments to R
value of R
oscilloscope until no further improvement is noted. Normally,
C
Equation 28 unless some performance issue is noted.
The optional capacitor C
noise away from the PWM comparator (see Figure 20). Keep
a position available for C
frequency capacitor of between 22pF and 150pF in case any
leading edge jitter problem is noted.
Case 2:
Case 1:
1
will not need adjustment. Keep the value of C
2
while observing the transient performance on an
---------------------------
2π
R
C
---------------------------
2π
R
C
2
1
2
1
⋅
F
R
C
=
=
0
⋅
1
2
2
=
=
L C
1
>
R
------------------------------------------------------------------------------- -
(
=
=
L C
2π
⋅
R
------------------------------------------------ -
2π V
1
-------------------------------- -
2π C ESR
⋅
1
R
-------------------------------------------------------------- -
2π V
⋅
)
0.66 V
V
--------------------------------------------------------------- -
2
⋅
≤
⋅
1
⋅
2
0.66 V
2π F
----------------------------------------------------------- -
2
>
OSC
⋅
⋅
F
, is sometimes needed to bypass
⋅
, and be prepared to install a high
F
OSC
1
0
F
2π F
-----------------------------------------------
⋅
2
0
0.66 V
⋅
OSC
⋅
0
<
0.66 V
21
⋅
⋅
⋅
OSC
-------------------------------- -
2π C ESR
⋅
0.66 V
V
0
IN
0.66 V
(
⋅
2π
OSC
⋅
IN
R
⋅
0
⋅
V
⋅
⋅
⋅
1
R
⋅
ESR
)
OSC
⋅
IN
is the peak-to-peak
2
⋅
V
1
⋅
1
IN
f
⋅
⋅
⋅
OSC
⋅
0
IN
⋅
R
F
F
IN
ESR
2
2
0
1
⋅
⋅
0
. Slowly increase the
⋅
⋅
⋅
⋅
L C
L C
C
L
L C
⋅
L
⋅
⋅
1
from
(EQ. 28)
0
ISL6310
Compensating the Converter operating without
Load-Line Regulation
The ISL6310 multi-phase converter operating without load
line regulation behaves in a similar manner to a voltage
mode controller. This section highlights the design
consideration for a voltage-mode controller requiring external
compensation. To address a broad range of applications, a
type-3 feedback network is recommended (see Figure 21).
Figure 22 highlights the voltage-mode control loop for a
synchronous-rectified buck converter, applicable, with a
small number of adjustments, to the multi-phase ISL6310
circuit. The output voltage (V
reference voltage, VREF, level. The error amplifier output
(COMP pin voltage) is compared with the oscillator (OSC)
modified saw-tooth wave to provide a pulse-width modulated
wave with an amplitude of V
PWM wave is smoothed by the output filter (L and C). The
output filter capacitor bank’s equivalent series resistance is
represented by the series resistor ESR.
The modulator transfer function is the small-signal transfer
function of V
DC gain, given by d
output filter, with a double pole break frequency at F
zero at F
represent the individual channel inductance and its DCR
divided by 2 (equivalent parallel value of the two output
inductors), while C and ESR represents the total output
capacitance and its equivalent series resistance.
The compensation network consists of the error amplifier
(internal to the ISL6310) and the external R
components. The goal of the compensation network is to
provide a closed loop transfer function with high 0dB crossing
frequency (F
phase margin (better than 45°). Phase margin is the
difference between the closed loop phase at F
The equations that follow relate the compensation network’s
poles, zeros and gain to the components (R
F
LC
FIGURE 21. COMPENSATION CONFIGURATION FOR
=
---------------------------
2π
C
R
CE
3
⋅
3
1
. For the purpose of this analysis, L and DCR
L C
0
OUT
; typically 0.1 to 0.3 of F
⋅
NON-LOAD-LINE REGULATED ISL6310 CIRCUIT
/V
COMP
MAX
R
R
1
2
V
F
. This function is dominated by a
IN
C
CE
2
/V
IN
C
OUT
=
OSC
1
at the PHASE node. The
-------------------------------- -
2π C ESR
) is regulated to the
, and shaped by the
⋅
COMP
VDIFF
1
SW
FB
⋅
) and adequate
1
1
, R
to R
0dB
2
ISL6310
, R
3
, C
and 180°.
August 7, 2008
3
(EQ. 29)
LC
, C
1
FN9209.4
to C
1
and a
, C
3
2
,