MAX15034BEVKIT+ Maxim Integrated Products, MAX15034BEVKIT+ Datasheet - Page 10

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MAX15034BEVKIT+

Manufacturer Part Number
MAX15034BEVKIT+
Description
KIT EVALUATION FOR MAX15034
Manufacturer
Maxim Integrated Products
Datasheets

Specifications of MAX15034BEVKIT+

Main Purpose
DC/DC, Step Down
Voltage - Input
5 ~ 28V
Regulator Topology
Buck
Board Type
Fully Populated
Utilized Ic / Part
MAX15034
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Output
-
Voltage - Output
-
Power - Output
-
Frequency - Switching
-
Outputs And Type
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Configurable, Single-/Dual-Output, Synchronous
Buck Controller for High-Current Applications
The MAX15034 switching power-supply controller can
be configured two ways. With the MODE input high, this
device operates as single-output, dual-phase, step-
down switching regulators where each output is 180°
out of phase. With MODE connected low, the
MAX15034 operates as a dual-output, step-down
switching regulator. The average current-mode control
topology of the MAX15034 offers high-noise immunity
while having benefits similar to those of peak current-
mode control. Average current-mode control has the
intrinsic ability to accurately limit the average current
sourced by the converter during a fault condition. When
a fault condition occurs, the error-amplifier output volt-
age (EAOUT1 or EAOUT2) that connects to the positive
10
PIN
15
16
17
18
19
20
21
22
23
24
25
26
27
28
______________________________________________________________________________________
NAME
PGND
BST1
BST2
REG
DH1
DH2
EN1
DL1
V
DL2
EN2
LX1
LX2
EP
IN
DD
Output 1 Enable. A logic-low shuts down channel 1’s MOSFET drivers. EN1 can be used for output
sequencing.
Boost Flying-Capacitor Connection. Reservoir capacitor connection for the high-side MOSFET driver
supply. Connect a 0.47μF ceramic capacitor between BST1 and LX1.
High-Side Gate Driver Output 1. DH1 drives the gate of the high-side MOSFET.
External Inductor Connection and Source Connection for the High-Side MOSFET for Output 1. LX1 also
serves as the return terminal for the high-side MOSFET driver.
Low-Side Gate Driver Output 1. Gate driver output for the synchronous MOSFET.
Supply Voltage for Low-Side Drivers. REG powers V
ceramic capacitors from V
currents of the driver from the internal circuitry.
Internal 5V Regulator Output. REG is derived internally from IN and is used to power the internal bias
circuitry. Bypass REG to AGND with a 4.7μF ceramic capacitor.
Supply Voltage Connection. Connect IN to a 5V to 28V input supply.
Power Ground. Source connection for the low-side MOSFET. Connect V
PGND.
Low-Side Gate Driver Output 2. Gate driver for the synchronous MOSFET.
External Inductor Connection and Source Connection for the High-Side MOSFET for Output 2. Also serves
as the return terminal for the high-side MOSFET driver.
High-Side Gate Driver Output 2. DH2 drives the gate of the high-side MOSFET.
Boost Flying-Capacitor Connection. Reservoir capacitor connection for the high-side MOSFET driver
supply. Connect a 0.47μF ceramic capacitor between BST2 and LX2.
Output 2 Enable. A logic-low shuts down channel 2’s MOSFET drivers. EN2 can be used for output
sequencing.
Exposed Pad. Connect exposed pad to ground plane (MAX15034BAUI only).
Detailed Description
DD
to PGND and a 1Ω resistor from V
input of the transconductance amplifier (CA1 or CA2) is
clamped, thus limiting the output current.
The MAX15034 has internal logic to ensure each output’s
monotonic startup under prebias load conditions. This
facilitates glitch-free output voltage power-up in the pres-
ence of another redundant/parallel voltage regulator.
The MAX15034 contains all blocks necessary for two
independently regulated average current-mode PWM
regulators. This device has two voltage error amplifiers
(VEA1 and VEA2), two current-error amplifiers (CEA1
and CEA2), two current-sensing amplifiers (CA1 and
CA2), two PWM comparators (CPWM1 and CPWM2),
and drivers for both low- and high-side power MOSFETs
(see Figure 1). Each PWM section is also equipped with
a pulse-by-pulse, current-limit protection and a fault
integration block for hiccup protection.
FUNCTION
DD
. Connect a parallel combination of 0.1μF and 1μF
Pin Description (continued)
DD
to REG to filter out the high-peak
DD
’s bypass capacitor returns to

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