MAX15034BEVKIT+ Maxim Integrated Products, MAX15034BEVKIT+ Datasheet - Page 14

• Manufacturer Part Number: MAX15034BEVKIT+
• Description: KIT EVALUATION FOR MAX15034
• Manufacturer: Maxim Integrated Products

Specifications of MAX15034BEVKIT+

• Main Purpose: DC/DC, Step Down
• Voltage - Input: 5 ~ 28V
• Regulator Topology: Buck
• Board Type: Fully Populated
• Utilized Ic / Part: MAX15034
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output: -
• Voltage - Output: -
• Power - Output: -
• Frequency - Switching: -
• Outputs And Type: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Configurable, Single-/Dual-Output, Synchronous
Buck Controller for High-Current Applications
The outer voltage control loop consists of the voltage-
error amplifier (VEA1). The noninverting input (EAN1) is
externally connected to the midpoint of a resistive volt-
age-divider from OUT1 to EAN1 to AGND. The voltage
loop gain is set by using an external resistor from the
output of this amplifier (EAOUT1) to its inverting input
(EAN1). The noninverting input of (VEA1) is connected
to the 0.61V internal reference.
The MAX15034 features two dedicated transconduc-
tance current-error amplifiers CEA1 and CEA2 with a
typical g
capability. The current-error amplifier outputs (CLP1 and
CLP2) serve as the inverting input to the PWM compara-
tors. CLP1 and CLP2 are externally accessible to pro-
vide frequency compensation for the inner current loops
(see C
current-error amplifier so that the inductor current down
slope, which becomes the up slope at the inverting
input of the PWM comparator, is less than the slope of
the internally generated voltage ramp (see the
Compensation section).
The PWM comparator (CPWM1 or CPWM2) sets the
duty cycle for each cycle by comparing the current-
error amplifier output to a 2V
each clock cycle an R-S flip-flop resets and the high-
side drivers (DH1 and DH2) turn on. The comparator
sets the flip-flop as soon as the ramp voltage exceeds
the current-error amplifier output voltage, thus terminat-
ing the on-cycle.
The voltage-error amplifier (VEA_) sets the gain of the
voltage control loop. Its output clamps to 1.14V and
-0.234V relative to V
put voltage by connecting a voltage-divider from the
output to EAN_ to GND (see Figure 4). At no load, the
output of the voltage error amplifier is zero.
Use the equation below to calculate the no load voltage:
14
______________________________________________________________________________________
CFF
m
, C
PWM Comparator and R-S Flip-Flop
of 550μS and 320μA output sink and source
V
CF
OUT NL
, and R
(
CM
)
=
CF
0 6125
= 0.61V. Set the MAX15034 out-
.
Voltage-Error Amplifier
Current-Error Amplifier
in Figure 2). Compensate the
P-P
×
⎛
⎝ ⎜
1
ramp. At the start of
+
R
R
2
1
⎞
⎠ ⎟
The voltage at full load is given by:
where ΔV
described in the Adaptive Voltage Positioning section.
Powering new-generation ICs requires new techniques
to reduce cost, size, and power dissipation. Voltage
positioning (Figure 5) reduces the total number of out-
put capacitors to meet a given transient response
requirement. Setting the no-load output voltage slightly
higher than the output voltage during nominally loaded
conditions allows a larger downward voltage excursion
when the output current suddenly increases.
Regulating at a lower output voltage under a heavy
load allows a larger upward-voltage excursion when
the output current suddenly decreases. A larger
allowed voltage-step excursion reduces the required
number of output capacitors and/or allows the use of
higher ESR capacitors.
The MAX15034 internal 0.6125V reference provides a
tolerance of ±1.25%. Using 0.1% resistors for R1 and
R2 allows a 4% variation from the nominal output volt-
age. This available voltage range allows the reduction
of the total number of output capacitors to meet a given
transient response requirement resulting in a voltage-
positioning window as shown in Figure 5.
From the allowable voltage-positioning window calcu-
late the value of R
where ΔV
dow, R
sense amplifier gain, and R
SENSE
V
OUT FL
OUT
OUT
(
R
F
is the allowable voltage-positioning win-
is the sense resistor, 36 is the current-
)
is the voltage-positioning window
=
=
F
Adaptive Voltage Positioning
I
0 6125
OUT
from the equation below.
.
×
R
×
SENSE
Δ
⎛
⎝ ⎜
V
1
1
OUT
+
is as shown in Figure 4.
R
R
1
2
×
⎞
⎠ ⎟
36
−
Δ
×
V
R
OUT
1