DK86060-3 Fujitsu Semiconductor America Inc, DK86060-3 Datasheet - Page 15

KIT DEV 16BIT DAC FOR MB86060

DK86060-3

Manufacturer Part Number
DK86060-3
Description
KIT DEV 16BIT DAC FOR MB86060
Manufacturer
Fujitsu Semiconductor America Inc
Datasheets

Specifications of DK86060-3

Number Of Dac's
1
Number Of Bits
16
Outputs And Type
1, Differential
Sampling Rate (per Second)
400M
Data Interface
Parallel
Dac Type
Current
Voltage Supply Source
Single
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
MB86060
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
865-1009
February 2009 Version 2.0
FME/MS/SFDAC1/DS/4250
MB86060 16-bit Interpolating Digital to Analog Converter
1.10.3
The MB86060 features a performance enhanced pinout to gain the maximum performance from the
PCB. Ground connection pins are provided adjacent to clock in, clock out and analog out pins to
minimise the loop inductance of the return current path. All critical power supplies are paired on
adjacent pins to minimise the decoupling loop inductance, and small value decoupling is provided
on-chip. Discrete decoupling, typically 100nF, must be provided for each power supply pin pair. See
Section 4.
1.11 Reset
A RESETB pin is provided, which when taken low allows the device to be reset and placed in a low
power state. There is a two cycle latency requiring the device to be clocked in order to reset the
device. On power up the device must be reset before it is operational. Multiple device clock
synchronization (see section 1.2.3), and configuration changes require a device reset to be
performed.
There are two reset modes available determined by the state of the TWOC pin. If TWOC is held low
while RESETB is taken low then a PARTIAL-RESET is performed. This will reset and place in a low
power state all sections of the device except the Clock Multiplier and Voltage Reference sections. If
TWOC is held high while RESETB is taken low, a FULL-RESET is performed. This will reset and
place in a low power state all sections of the device.
Copyright © 2003-2009 Fujitsu Microelectronics Europe GmbH
Disclaimer: The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before
TWOC
0
1
ordering.The information and circuit diagrams in this document are presented “as is”, no license is granted by implication or otherwise.
Pinout
RESETB
1 > 0
1 > 0
PARTIAL-RESET
FULL-RESET
Function
Table 10: Reset Modes
All sections except Clock Multiplier and
Production
Voltage Reference
Sections Reset
All sections
Page 15 of 44

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