STEVAL-IFS003V1 STMicroelectronics, STEVAL-IFS003V1 Datasheet - Page 22

BOARD STLM75/STDS75/ST72F651

STEVAL-IFS003V1

Manufacturer Part Number
STEVAL-IFS003V1
Description
BOARD STLM75/STDS75/ST72F651
Manufacturer
STMicroelectronics

Specifications of STEVAL-IFS003V1

Design Resources
STEVAL-IFS003V1 Gerber Files STEVAL-IFS003V1 Schematic STEVAL-IFS003V1 Bill of Materials
Sensor Type
Temperature
Sensing Range
-55°C ~ 125°C
Interface
I²C
Voltage - Supply
7.5 V ~ 19 V
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
ST72F651, STDS75, STLM75
Silicon Manufacturer
ST Micro
Silicon Core Number
STLM75/STDS75 And ST72F651AR6
Kit Application Type
Sensing - Temperature
Application Sub Type
Temperature Sensor
Kit Contents
Board
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Sensitivity
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
497-6238
Functional description
3.4.5
22/40
Acknowledge
Each byte of eight bits is followed by one acknowledge bit. This acknowledge bit is a low
level put on the bus by the receiver whereas the master generates an extra acknowledge
related clock pulse (see
generate an acknowledge after the reception of each byte that has been clocked out of the
slave transmitter.
The device that acknowledges has to pull down the SDA line during the acknowledge clock
pulse in such a way that the SDA line is a stable low during the high period of the
acknowledge related clock pulse. Of course, setup and hold times must be taken into
account. A master receiver must signal an end of data to the slave transmitter by not
generating an acknowledge on the last byte that has been clocked out of the slave. In this
case the transmitter must leave the data line high to enable the master to generate the
STOP condition.
Figure 7.
SCL FROM
MASTER
DATA OUTPUT
BY TRANSMITTER
DATA OUTPUT
BY RECEIVER
Acknowledgement sequence
START
Figure
MSB
1
Doc ID 13296 Rev 12
7). A slave receiver which is addressed is obliged to
2
LSB
8
ACKNOWLEDGEMENT
CLOCK PULSE FOR
9
STLM75
AI00601

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