ADZS-BF518F-EZBRD Analog Devices Inc, ADZS-BF518F-EZBRD Datasheet - Page 29

• Manufacturer Part Number: ADZS-BF518F-EZBRD
• Description: BOARD EVAL BF512F/14F/16F/18F
• Manufacturer: Analog Devices Inc
• Series: Blackfin®r
• Type: DSPr

Specifications of ADZS-BF518F-EZBRD

• Featured Product: Blackfin® BF50x Series Processors
• Contents: Board, Cables, CD
• Silicon Manufacturer: Analog Devices
• Core Architecture: Blackfin
• Features: JTAG Emulator Or Standalone Debug Agent Board
• Kit Contents: Board Only
• Silicon Family Name: Blackfin
• Architecture: DSP
• Ide Included: Visual DSP++
• Code Gen Tools Included: Visual DSP++
• Debugger Included: Visual DSP++
• Silicon Core Number: ADSP-BF518F
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: BF512F/14F/16F/18F
• For Use With: ADZS-BFBLUET-EZEXT - EZ-EXTENDER DAUGHTERBOARD
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Preliminary Technical Data
Asynchronous Memory Write Cycle Timing
Table 21. Asynchronous Memory Write Cycle Timing
1
Parameter
Timing Requirements
t
t
Switching Characteristics
t
t
t
t
Output pins/balls include AMS3–0, ABE1–0, ADDR19–1, DATA15–0, AOE, AWE.
SARDY
HARDY
DDAT
ENDAT
DO
HO
ADDR19–1
DATA15–0
CLKOUT
ABE1–0
AMSx
ARDY
AWE
ARDY Setup Before CLKOUT
ARDY Hold After CLKOUT
DATA15–0 Disable After CLKOUT
DATA15–0 Enable After CLKOUT
Output Delay After CLKOUT
Output Hold After CLKOUT
2 CYCLES
t
ENDAT
SETUP
t
DO
t
t
SARDY
DO
ABE, ADDRESS
WRITE DATA
PROGRAMMED WRITE
ACCESS 2 CYCLES
1
1
Figure 9. Asynchronous Memory Write Cycle Timing
Rev. PrE | Page 29 of 62 | March 2009
t
SARDY
EXTENDED
ACCESS
1 CYCLE
t
t
HO
HARDY
1 CYCLE
HOLD
ADSP-BF512/BF514/BF516/BF518(F)
t
HO
t
DDAT
Min
4.0
0.0
1.0
0.8
Max
6.0
6.0
Unit
ns
ns
ns
ns
ns
ns