ADZS-BF518F-EZLITE Analog Devices Inc, ADZS-BF518F-EZLITE Datasheet - Page 26

• Manufacturer Part Number: ADZS-BF518F-EZLITE
• Description: KIT EZ LITE BF512F/14F/16F/18F
• Manufacturer: Analog Devices Inc
• Type: DSPr

Specifications of ADZS-BF518F-EZLITE

• Featured Product: Blackfin® BF50x Series Processors
• Contents: Board, Cables, CD, Head Phones, Power Supply
• Silicon Manufacturer: Analog Devices
• Core Architecture: Blackfin
• Features: USB-based, PC-hosted Tool Set
• Kit Contents: Brd, PSU, CD, Docs, SD Card, Cables
• Silicon Family Name: Blackfin
• Silicon Core Number: ADSP-BF518F
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: BF512F/14F/16F/18F
• For Use With: ADZS-BFBLUET-EZEXT - EZ-EXTENDER DAUGHTERBOARD
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

ADSP-BF512/BF514/BF516/BF518(F)
ABSOLUTE MAXIMUM RATINGS
Stresses greater than those listed in
nent damage to the device. These are stress ratings only.
Functional operation of the device at these or any other condi-
tions greater than those indicated in the operational sections of
this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device
reliability.
Table 15. Absolute Maximum Ratings
1
2
3
4
Table 16. Maximum Duty Cycle for Input Transient Voltage
1
When programming OTP memory on the ADSP-
BF512/BF514/BF516/BF518(F) processor, the V
must be set to the write value specified in the
tions on Page
that the write voltage may be applied (dependent on voltage and
junction temperature) to V
Therefore, maximum OTP memory programming time for the
processor is shown in
Table 17. Maximum OTP Memory Programming Time
Parameter
Internal Supply Voltage (V
External (I/O) Supply Voltage (V
Input Voltage
Input Voltage
Output Voltage Swing
Load Capacitance
Storage Temperature Range
Junction Temperature Underbias
V
TBD
TBD
TBD
TBD
TBD
VPPOTP Voltage (V) 25 C
6.9
7.0
7.1
Applies to 100% transient duty cycle. For other duty cycles see
Applies only when V
Applies to signals SCL, SDA.
For proper SDRAM controller operation, the maximum load capacitance is 50 pF
Applies to all signal pins/balls with the exception of CLKIN, XTAL, VROUT.
fications, the range is V
(at 3.3 V) or 30 pF (at 2.5 V) for ADDR19–1, DATA15–0, ABE1–0/SDQM1–0,
CLKOUT, SCKE, SA10, SRAS, SCAS, SWE, and SMS.
IN
Min (V)
1, 2
1, 3
23. There is a finite amount of cumulative time
V
TBD
TBD
TBD
TBD
TBD
DDEXT
4
IN
Max (V)
DDEXT
is within specifications. When V
Table
TBD sec
2400 sec
1000 sec
± 0.2 Volts.
DDINT
PPOTP
17.
)
DDEXT
over the lifetime of the part.
Maximum Duty Cycle
100 %
40%
25%
15%
10%
TBD sec TBD sec TBD sec
TBD sec TBD sec TBD sec
85 C
TBD sec TBD sec TBD sec
Table 15
)
Temperature
Rating
TBD V to +TBD V
–0.3 V to +3.8 V
–0.5 V to +3.6 V
–0.5 V to +5.5 V
–0.5 V to V
200 pF
–65 C to +150 C
+110ºC
110 C
may cause perma-
Operating Condi-
DDEXT
PPOTP
DDEXT
Table
Rev. PrE | Page 26 of 62 | March 2009
is outside speci-
pin/ball
125 C
+0.5 V
16.
1
PACKAGE INFORMATION
The information presented in
details about the package branding for the processor. For a com-
plete listing of product availability, see
Page
Table 18. Package Brand Information
ESD SENSITIVITY
Brand Key
ADSP-BF51x
t
pp
Z
ccc
vvvvvv.x
n.n
#
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62.
Figure 6. Product Information on Package
ESD (electrostatic discharge) sensitive device.
Charged devices and circuit boards can discharge
without detection. Although this product features
patented or proprietary protection circuitry, damage
may occur on devices subjected to high energy ESD.
Therefore, proper ESD precautions should be taken to
avoid performance degradation or loss of functionality.
Preliminary Technical Data
#yyww country_of_origin
a
B
ADSP-BF51x
vvvvvv.x n.n
Product Name
Field Description
Temperature Range
Package Type
Lead Free Option
See Ordering Guide
Assembly Lot Code
Silicon Revision
RoHS Compliance Designator
Date Code
tppZccc
Figure 6
Ordering Guide on
and
Table 18
provides