ADZS-21469-EZLITE Analog Devices Inc, ADZS-21469-EZLITE Datasheet - Page 26

• Manufacturer Part Number: ADZS-21469-EZLITE
• Description: KIT EVAL EZ LITE ADSP-21469
• Manufacturer: Analog Devices Inc
• Series: SHARC®r
• Type: DSPr

Specifications of ADZS-21469-EZLITE

• Contents: Board, Cables, Debugger, Power Supply, Software
• Silicon Manufacturer: Analog Devices
• Core Architecture: SHARC
• Features: Evaluation Version Of VisualDSP++, Debug Agent Board
• Kit Contents: Board Cables CD Docs
• Silicon Family Name: SHARC
• Architecture: DSP
• Ide Included: Visual DSP++
• Code Gen Tools Included: Visual DSP++
• Debugger Included: Visual DSP++
• Silicon Core Number: ADSP-21469
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: ADSP-2146x
• Lead Free Status / Rohs Status: Supplier Unconfirmed

ADSP-21462/ADSP-21465/ADSP-21467/ADSP-21469
Timer WDTH_CAP Timing
The following timing specification applies to timer0 and timer1,
and in WDTH_CAP (pulse width count and capture) mode.
Timer signals are routed to the DPI_P14–1 pins through the
SRU. Therefore, the timing specification provided below is valid
at the DPI_P14–1 pins.
Table 21. Timer Width Capture Timing
Pin to Pin Direct Routing (DAI and DPI)
For direct pin connections only (for example DAI_PB01_I to
DAI_PB02_O).
Table 22. DAI Pin to Pin Routing
Parameter
Timing Requirement
t
Parameter
Timing Requirement
t
PWI
DPIO
Timer Pulse Width
Delay DAI/DPI Pin Input Valid to DAI Output Valid
DPI_P14 - 1
(TIMER1-0)
DAI_Pn
DPI_Pn
DAI_Pm
DPI_Pm
Figure 12. Timer Width Capture Timing
Figure 13. DAI Pin to Pin Direct Routing
Rev. PrC | Page 26 of 62 | January 2009
TBD
Min
t
t
PWI
DPIO
Min
TBD
Max
TBD
Preliminary Technical Data
Max
TBD
Unit
ns
Unit
ns