ADZS-21469-EZLITE Analog Devices Inc, ADZS-21469-EZLITE Datasheet - Page 34

• Manufacturer Part Number: ADZS-21469-EZLITE
• Description: KIT EVAL EZ LITE ADSP-21469
• Manufacturer: Analog Devices Inc
• Series: SHARC®r
• Type: DSPr

Specifications of ADZS-21469-EZLITE

• Contents: Board, Cables, Debugger, Power Supply, Software
• Silicon Manufacturer: Analog Devices
• Core Architecture: SHARC
• Features: Evaluation Version Of VisualDSP++, Debug Agent Board
• Kit Contents: Board Cables CD Docs
• Silicon Family Name: SHARC
• Architecture: DSP
• Ide Included: Visual DSP++
• Code Gen Tools Included: Visual DSP++
• Debugger Included: Visual DSP++
• Silicon Core Number: ADSP-21469
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: ADSP-2146x
• Lead Free Status / Rohs Status: Supplier Unconfirmed

ADSP-21462/ADSP-21465/ADSP-21467/ADSP-21469
Table 30. Link Ports – Transmit
Parameter
Timing Requirements
t
t
Switching Characteristics
t
t
t
t
t
SLACH
HLACH
DLDCH
HLDCH
LCLKTWL
LCLKTWH
DLACLK
LDAT7-0
LCLK
LACK (IN)
t
HLDCH
LACK Setup Before LCLK High
LACK Hold After LCLK High
Data Delay After LCLK High
Data Hold After LCLK High
LCLK Width Low
LCLK Width High
LCLK Low Delay After LACK High
THE
OUT
t
LCLKTWH
t
SLACH
t
DLDCH
REQUIREMENT APPLIES TO THE RISING EDGE OF LCLK ONLY FOR THE FIRST BYTE TRANSMITTED.
t
LCLKTWL
Rev. PrC | Page 34 of 62 | January 2009
TRANSMITTED
LAST BYTE
Figure 21. Link Ports—Transmit
t
SLACH
TRANSMITTED
FIRST BYTE
t
HLACH
Min
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
LCLK INACTIVE
Preliminary Technical Data
(HIGH)
Max
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
t
DLACLK
Unit
ns
ns
ns
ns
ns
ns
ns