MPC8572DS Freescale Semiconductor, MPC8572DS Datasheet - Page 34

• Manufacturer Part Number: MPC8572DS
• Description: KIT MPU POWERQUICC III
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8572DS

• Contents: Board
• Data Rate: 10 Mbps to 100 Mbps
• Memory Type: Flash, DDR, DDR2, DDR3, SDRAM
• Interface Type: I2C, Ethernet
• Operating Voltage: 3.3 V
• Data Bus Width: 32 bit
• Product: Development Tools
• Silicon Manufacturer: Freescale
• Core Architecture: Power Architecture
• Core Sub-architecture: PowerQUICC
• Silicon Core Number: MPC85xx
• Silicon Family Name: PowerQUICC III
• Rohs Compliant: Yes
• For Use With/related Products: MPC8572E
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Ethernet: Enhanced Three-Speed Ethernet (eTSEC)
Figure 11
8.2.3
This section describes the MII transmit and receive AC timing specifications.
8.2.3.1
Table 29
34
At recommended operating conditions with LV
TX_CLK clock period 10 Mbps
TX_CLK clock period 100 Mbps
TX_CLK duty cycle
TX_CLK to MII data TXD[3:0], TX_ER, TX_EN delay
TX_CLK data clock rise (20%-80%)
TX_CLK data clock fall (80%-20%)
Notes:
1. The symbols used for timing specifications herein follow the pattern of t
2. Guaranteed by design.
for inputs and t
transmit timing (MT) for the time t
general, the clock reference symbol representation is based on two to three letters representing the clock of a particular
functional. For example, the subscript of t
convention is used with the appropriate letter: R (rise) or F (fall).
provides the MII transmit AC timing specifications.
shows the GMII receive AC timing diagram.
MII AC Timing Specifications
MII Transmit AC Timing Specifications
(first two letters of functional block)(reference)(state)(signal)(state)
RXD[7:0]
RX_CLK
Parameter/Condition
MPC8572E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5
RX_ER
RX_DV
Table 29. MII Transmit AC Timing Specifications
MTX
Figure 11. GMII Receive AC Timing Diagram
t
t
GRXH
GRDVKH
DD
clock reference (K) going high (H) until data outputs (D) are invalid (X). Note that, in
/TV
MTX
DD
t
GRX
represents the MII(M) transmit (TX) clock. For rise and fall times, the latter
of 2.5/ 3.3 V ± 5%.
t
Symbol
MTXH/
t
t
GRXF
MTKHDX
t
t
MTXR
t
MTXF
t
MTX
MTX
t
GRDXKH
t
MTX
2
2
2
for outputs. For example, t
(first two letters of functional block)(signal)(state) (reference)(state)
1
t
GRXR
Min
1.0
1.0
35
—
—
1
Typ
400
40
—
—
—
5
MTKHDX
Freescale Semiconductor
symbolizes MII
Max
4.0
4.0
—
—
65
15
Unit
ns
ns
ns
ns
ns
%