MPC8572DS Freescale Semiconductor, MPC8572DS Datasheet - Page 36

• Manufacturer Part Number: MPC8572DS
• Description: KIT MPU POWERQUICC III
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8572DS

• Contents: Board
• Data Rate: 10 Mbps to 100 Mbps
• Memory Type: Flash, DDR, DDR2, DDR3, SDRAM
• Interface Type: I2C, Ethernet
• Operating Voltage: 3.3 V
• Data Bus Width: 32 bit
• Product: Development Tools
• Silicon Manufacturer: Freescale
• Core Architecture: Power Architecture
• Core Sub-architecture: PowerQUICC
• Silicon Core Number: MPC85xx
• Silicon Family Name: PowerQUICC III
• Rohs Compliant: Yes
• For Use With/related Products: MPC8572E
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Ethernet: Enhanced Three-Speed Ethernet (eTSEC)
Figure 14
8.2.4
This section describes the TBI transmit and receive AC timing specifications.
8.2.4.1
Table 31
36
At recommended operating conditions with LV
TCG[9:0] setup time GTX_CLK going high
TCG[9:0] hold time from GTX_CLK going high
GTX_CLK rise (20%–80%)
GTX_CLK fall time (80%–20%)
Notes:
1. The symbols used for timing specifications herein follow the pattern of t
2. Guaranteed by design.
)(reference)(state)
t
referenced data signals (D) reach the valid state (V) or setup time. Also, t
(TT) with respect to the time from t
(X) or hold time. Note that, in general, the clock reference symbol representation is based on three letters
representing the clock of a particular functional. For example, the subscript of t
(TX) clock. For rise and fall times, the latter convention is used with the appropriate letter: R (rise) or F (fall).
TTKHDV
provides the TBI transmit AC timing specifications.
shows the MII receive AC timing diagram.
TBI AC Timing Specifications
TBI Transmit AC Timing Specifications
symbolizes the TBI transmit timing (TT) with respect to the time from t
RXD[3:0]
RX_CLK
MPC8572E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5
RX_ER
RX_DV
Parameter/Condition
for inputs and t
Table 31. TBI Transmit AC Timing Specifications
(first two letters of functional block)(reference)(state)(signal)(state)
Figure 14. MII Receive AC Timing Diagram
t
t
MRXH
MRDVKH
DD
TTX
/TV
(K) going high (H) until the referenced data signals (D) reach the invalid state
t
DD
MRX
of 2.5/ 3.3 V ± 5%.
Valid Data
Symbol
t
t
t
MRXF
TTKHDX
TTKHDV
t
t
TTXR
TTXF
2
2
1
t
MRDXKL
t
MRXR
(first two letters of functional block)(signal)(state
TTKHDX
Min
2.0
1.0
—
—
TTX
TTX
symbolizes the TBI transmit timing
(K) going high (H) until the
represents the TBI (T) transmit
for outputs. For example,
Typ
—
—
—
—
Freescale Semiconductor
Max
1.0
1.0
—
—
Unit
ns
ns
ns
ns