EVB9S12NE64 Freescale Semiconductor, EVB9S12NE64 Datasheet - Page 18

• Manufacturer Part Number: EVB9S12NE64
• Description: KIT EVALUATION FOR NE64
• Manufacturer: Freescale Semiconductor

Specifications of EVB9S12NE64

• Mfg Application Notes: MC9S12NE64 Integrated Ethernet Controller Implementing an Ethernet Interface with the MC9S12NE64 Web Server Development with MC9S12NE64 and Open TCP
• Processor To Be Evaluated: MC9S12NE64
• Data Bus Width: 16 bit
• Interface Type: RS-232, Ethernet
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

E V B 9 S 1 2 N E 6 4
MCU2_GP PORT
The MCU2_GP Port provides access to the M9S12NE64 I/O ports G, H, J, S, T and AD.
The PG0-6, PH0-7, and PJ0-3 I/O ports are also applied as the EMAC MII signals if enabled.
User should not apply these port pins if the EMAC MII expansion is operating.
Ports PJ 6 and 7 are also the I2C interface for the EVB EEprom.
BDM PORT
The BDM port is a 6 pin header compatible with a Motorola Background Debug Mode (BDM)
Pod.
programming and debugging in real-time without using HCS12 I/O resources.
BGND/MODC 1 2 GND
This allows the connection of a background debugger for software development,
3 4 RESET*
5 6 +3.3V
PE6 / MODB 39 40 PE7
PE0 / XIRQ* 33 34 PE1 / IRQ*
PE4 / ECLK 37 38 PE5 / MODA
PK0 / XA14 17 18 PK1 / XA15
PK2 / XA16 19 20 PK3 / XA17
PK4 / XA18 21 22 PK5 / XA19
PK6 / XCS* 23 24 PK7 / ECS*
PE2 / R/W* 35 36 PE3 / LSTRB*
PA2 / D10 11 12 PA3 / D11
PA4 / D12 13 14 PA5 / D13
PA6 / D14 15 16 PA7 / D15
PB0 / D0
PB2 / D2
PB4 / D4
PB6 / D6
PA0 / D8
PL0 25 26 PL1
PL2 27 28 PL3
PL4 29 30 PL5
PL6 31 32 GND
See the HCS12 Technical Reference Manual for
complete documentation of the BDM.
1 2
3 4
5 6
7 8
9 10 PA1 / D9
PB1 / D1
PB3 / D3
PB5 / D5
PB7 / D7
18
Notes:
6) PA0-7 and PB0-7 are
7) PK0-7 also provide
8) PL0-4 provide Ethernet
9) PE2-4 provide Data
0 5 / 2 4 / 0 4
also the Address and
Data Bus in Expanded
Modes.
Expanded Address
signals in Expanded
Modes with EMK bit
set.
PHY status signals if
enabled.
bus controls in
Expanded Modes.