HD64F3437TFI16V Renesas Electronics America, HD64F3437TFI16V Datasheet - Page 183

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HD64F3437TFI16V

Manufacturer Part Number
HD64F3437TFI16V
Description
MCU FLASH 60K 100-TQFP
Manufacturer
Renesas Electronics America
Datasheet

Specifications of HD64F3437TFI16V

Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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7.12.2
Table 7.23 summarizes the port B registers.
Table 7.23 Port B Registers
Name
Port B data direction register
Port B output data register
Port B input data register
Note: The port B data direction register (PBDDR) and port 7 input data register 7 (P7PIN) have
Port B Data Direction Register (PBDDR)
PBDDR is an 8-bit register that controls the input/output direction of each pin in port B. A pin
functions as an output pin if the corresponding PBDDR bit is set to 1, and as an input pin if this bit
is cleared to 0.
PBDDR is a write-only register. Read data is invalid. If read, the values of the port 7 data input
register (P7PIN) are returned, indicating the pin levels of port 7.
PBDDR is initialized to H'00 by a reset and in hardware standby mode. In software standby mode
it retains its existing values, so if a transition to software standby mode occurs while a PBDDR bit
is set to 1, the corresponding pin remains in the output state.
Bit
Initial value
Read/Write
the same address.
Register Configuration and Descriptions
PB
7
W
7
0
DDR PB
6
W
6
0
DDR PB
Abbreviation
PBDDR
PBODR
PBPIN
5
W
5
0
DDR PB
Read/Write
W
R/W
R
4
W
4
0
DDR PB
3
W
3
0
DDR PB
Initial Value
H'00
H'00
Undetermind
2
W
2
0
DDR PB
1
W
1
0
DDR PB
Address
H'FFBE
H'FFBC
H'FFBD
0
W
0
0
DDR
151

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