ST10F276-6Q3 STMicroelectronics, ST10F276-6Q3 Datasheet - Page 32
ST10F276-6Q3
Manufacturer Part Number
ST10F276-6Q3
Description
MCU 16BIT 832K FLASH 144-PQFP
Manufacturer
STMicroelectronics
Series
ST10r
Datasheet
1.ST10F276-4TR3.pdf
(231 pages)
Specifications of ST10F276-6Q3
Core Processor
ST10
Core Size
16-Bit
Speed
64MHz
Connectivity
ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
111
Program Memory Size
832KB (832K x 8)
Program Memory Type
FLASH
Ram Size
68K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
144-MQFP, 144-PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Internal Flash memory
4.3.4
32/231
Flash control register 1 high
The Flash control register 1 high (FCR1H), together with Flash control register 1 low
(FCR1L), is used to select the sectors to erase, or during any write operation to monitor the
status of each sector and each bank of the module selected by SMOD bit of FCR0H. First
diagram shows FCR1H meaning when SMOD = 0; the second one when SMOD = 1.
FCR1H (0x0E 0006) SMOD = 0
FCR1H (0x0E 0006) SMOD = 1
Table 9.
During any erase operation, these bits are automatically set and give the status of the two
sectors of Bank 1 (B1F1-B1F0). The meaning of B1Fy bit for sector y of Bank 1 is given by
Table
detected.
SMOD = 0 (XFLASH selected)
SMOD = 1 (IFLASH selected)
15
15
B3F(1:0)
B1F(1:0)
B(3:2)S
B(1:0)S
Bit
10. These bits are automatically reset at the end of a erase operation if no errors are
14
14
Reserved
Reserved
Flash control register 1 high
13
13
Bank 3 XFLASH sector 1:0 status
During any erase operation, these bits are automatically set and give the status of the
two sectors of Bank 3 (B3F1-B3F0). The meaning of B3Fy bit for sector y of Bank 1 is
given by
no errors are detected.
Bank 3-2 status (XFLASH)
During any erase operation, these bits are automatically modified and give the status
of the two banks (B3-B2). The meaning of BxS bit for bank x is given in
These bits are automatically reset at the end of a erase operation if no errors are
detected.
Bank 1 IFLASH sector 1:0 status
During any erase operation, these bits are automatically set and give the status of the
two sectors of Bank 1 (B1F1-B1F0). The meaning of B1Fy bit for sector y of Bank 1 is
given by
no errors are detected.
Bank 1-0 status (IFLASH)
During any erase operation, these bits are automatically modified and give the status
of the two banks (B1-B0). The meaning of BxS bit for bank x is given in
These bits are automatically reset at the end of a erase operation if no errors are
detected.
-
12
12
Table
Table
11
11
10. These bits are automatically reset at the end of a erase operation if
10. These bits are automatically reset at the end of a erase operation if
10
10
B3S B2S
B1S B0S
RS
RS
9
9
FCR
FCR
RS
RS
8
8
7
7
Function
6
6
Reserved
Reserved
5
5
4
4
3
3
Reset value: 0000h
Reset value: 0000h
2
2
Table
Table
ST10F276E
B3F1 B3F0
B1F1 B1F0
RS
RS
1
1
10.
10.
RS
RS
0
0
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