ST10F280 STMicroelectronics, ST10F280 Datasheet - Page 112

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ST10F280

Manufacturer Part Number
ST10F280
Description
MCU 16BIT 512K FLASH MAC 208-PBG
Manufacturer
STMicroelectronics
Series
ST10r
Datasheet

Specifications of ST10F280

Core Processor
ST10
Core Size
16-Bit
Speed
40MHz
Connectivity
ASC, CAN, EBI/EMI, SSC
Peripherals
POR, PWM, WDT
Number Of I /o
143
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
18K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 32x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
208-PBGA
Processor Series
ST10F28x
Core
ST10
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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ST10F280
14 - SERIAL CHANNELS
Serial communication with other microcontrollers,
microprocessors, terminals or external peripheral
components is provided by two serial interfaces: the
asynchronous / synchronous serial channel (ASCO)
and the high-speed synchronous serial channel
(SSC). Two dedicated Baud rate generators set up
all standard Baud rates without the requirement of
oscillator tuning. For transmission, reception and
erroneous reception, 3 separate interrupt vectors
are provided for each serial channel.
14.1 - Asynchronous / Synchronous Serial
Interface (ASCO)
The asynchronous / synchronous serial interface
(ASCO) provides serial communication between
the
microprocessors or external peripherals.
A set of registers is used to configure and to
control the ASCO serial interface:
– P3, DP3, ODP3 for pin configuration
112/186
Figure 56 : Asynchronous Mode of Serial Channel ASC0
RxD0/P3.11
Input
Pin
CPU
Clock
ST10F280
0
1
MUX
S0R
and
Sampling
other
S0REN
S0FEN
S0PEN
S0OEN
S0LB
2
microcontrollers,
Register S0RBUF
Receive Buffer
Receive Shift
Baud Rate Timer
Reload Register
S0M S0STP
Register
Serial Port Control
Internal Bus
Shift Clock
Clock
– SOBG for Baud rate generator
– SOTBUF for transmit buffer
– SOTIC for transmit interrupt control
– SOTBIC for transmit buffer interrupt control
– SOCON for control
– SORBUF for receive buffer (read only)
– SORIC for receive interrupt control
– SOEIC for error interrupt control
14.1.1 - ASCO in Asynchronous Mode
In asynchronous mode, 8 or 9-bit data transfer,
parity generation and the number of stop bit can
be selected. Parity framing and overrun error
detection is provided to increase the reliability of
data transfers. Transmission and reception of data
is double-buffered. Full-duplex communication up
to 1.25M Bauds (at 40MHz of f
in this mode.
S0FE
Register S0TBUF
Transmit Buffer
Transmit Shift
S0PE
Register
16
S0OE
S0RIR
S0TIR
S0EIR
TxD0 / P3.10
Output
Pin
CPU
Receive Interrupt
Request
Transmit Interrupt
Request
Error Interrupt
Request
) is supported

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