ST10F280 STMicroelectronics, ST10F280 Datasheet - Page 152

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ST10F280

Manufacturer Part Number
ST10F280
Description
MCU 16BIT 512K FLASH MAC 208-PBG
Manufacturer
STMicroelectronics
Series
ST10r
Datasheet

Specifications of ST10F280

Core Processor
ST10
Core Size
16-Bit
Speed
40MHz
Connectivity
ASC, CAN, EBI/EMI, SSC
Peripherals
POR, PWM, WDT
Number Of I /o
143
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
18K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 32x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
208-PBGA
Processor Series
ST10F28x
Core
ST10
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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ST10F280
RP0H (F108h / 84h)
Notes: 1. RP0H.7 to RP0H.5 bits are loaded only during a long hardware reset. As pull-up resistors are active on each Port P0H pins during
EXICON (F1C0h / E0h )
152/186
WRC
CSSEL
SALSEL
CLKSEL
EXIxES(x=7...0)
15
15
-
EXI7ES
RW
reset, RP0H default value is "FFh".
2. These bits are set according to Port 0 configuration during any reset sequence.
2
2
14
14
2
1 - 2
-
13
13
-
EXI6ES
RW
External Interrupt x Edge Selection Field (x=7...0)
0 0:
0 1:
1 0:
1 1:
12
Write Configuration Control
‘0’: Pin WR acts as WRL, pin BHE acts as WRH
‘1’: Pins WR and BHE retain their normal function
Chip Select Line Selection (Number of active CS outputs)
0 0: 3 CS lines: CS2...CS0
0 1: 2 CS lines: CS1...CS0
1 0: No CS lines at all
1 1: 5 CS lines: CS4...CS0 (Default without pull-downs)
Segment Address Line Selection (Number of active segment address outputs)
0 0: 4-bit segment address: A19...A16
0 1: No segment address lines at all
1 0: 8-bit segment address: A23...A16
1 1: 2-bit segment address: A17...A16 (Default without pull-downs)
System Clock Selection
000: f
001: f
010: f
011: f
100: f
101: f
110: f
111: f
12
-
Fast external interrupts disabled: standard mode
EXxIN pin not taken in account for entering/exiting Power Down mode.
Interrupt on positive edge (rising)
Enter Power Down mode if EXiIN = ‘0’, exit if EXxIN = ‘1’ (referred as ‘high’ active level)
Interrupt on negative edge (falling)
Enter Power Down mode if EXiIN = ‘1’, exit if EXxIN = ‘0’ (referred as ‘low’ active level)
Interrupt on any edge (rising or falling)
Always enter Power Down mode, exit if EXxIN level changed.
CPU
CPU
CPU
CPU
CPU
CPU
CPU
CPU
11
11
-
EXI5ES
= 2.5 x f
= 0.5 x f
= 10 x f
= f
= 5 x f
= 2 x f
= 3 x f
= 4 x f
RW
OSC
10
10
-
OSC
OSC
OSC
OSC
OSC
OSC
OSC
9
9
-
EXI4ES
RW
8
8
-
ESFR
ESFR
7
7
EXI3ES
RW
CLKSEL
R
1 - 2
6
6
5
5
EXI2ES
RW
SALSEL
4
4
R
2
3
3
EXI1ES
RW
Reset Value: - - XXH
Reset Value: 0000h
2
CSSEL
2
R
2
1
1
EXI0ES
RW
WRC
R
0
2
0

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