PIC18F85K22-I/PT Microchip Technology, PIC18F85K22-I/PT Datasheet - Page 122

• Manufacturer Part Number: PIC18F85K22-I/PT
• Description: IC, 8BIT MCU, PIC18F, 64MHZ, TQFP-80
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F85K22-I/PT

• Controller Family/series: PIC18
• No. Of I/o's: 69
• Eeprom Memory Size: 1KB
• Ram Memory Size: 2KB
• Cpu Speed: 64MHz
• No. Of Timers: 8
• Core Size: 8 Bit
• Program Memory Size: 32KB
• Core Processor: PIC
• Speed: 64MHz
• Connectivity: EBI/EMI, I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 24x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F87K22 FAMILY
8.1
The operation of the interface is controlled by the
MEMCON register
available in all program memory operating modes
except Microcontroller mode. In this mode, the register
is disabled and cannot be written to.
The EBDIS bit (MEMCON<7>) controls the operation
of the bus and related port functions. Clearing EBDIS
enables the interface and disables the I/O functions of
the ports, as well as any other functions multiplexed to
those pins. Setting the bit enables the I/O ports and
other functions, but allows the interface to override
everything else on the pins when an external memory
operation is required. By default, the external bus is
always enabled and disables all other I/O.
REGISTER 8-1:
DS39960D-page 122
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5-4
bit 3-2
bit 1-0
Note 1:
EBDIS
R/W-0
External Memory Bus Control
Unimplemented on 64-pin devices (PIC18F6XK22), read as ‘0’.
EBDIS: External Bus Disable bit
1 = External bus is enabled when microcontroller accesses external memory; otherwise, all external
0 = External bus is always enabled, I/O ports are disabled
Unimplemented: Read as ‘0’
WAIT<1:0>: Table Reads and Writes Bus Cycle Wait Count bits
11 = Table reads and writes will wait 0 T
10 = Table reads and writes will wait 1 T
01 = Table reads and writes will wait 2 T
00 = Table reads and writes will wait 3 T
Unimplemented: Read as ‘0’
WM<1:0>: TBLWT Operation with 16-Bit Data Bus Width Select bits
1x = Word Write mode: TABLAT word output; WRH is active when TABLAT is written
01 = Byte Select mode: TABLAT data is copied on both MSB and LSB; WRH and (UB or LB) will activate
00 = Byte Write mode: TABLAT data is copied on both MSB and LSB; WRH or WRL will activate
bus drivers are mapped as I/O ports
U-0
—
(Register
MEMCON: EXTERNAL MEMORY BUS CONTROL REGISTER
W = Writable bit
‘1’ = Bit is set
8-1). This register is
WAIT1
R/W-0
WAIT0
R/W-0
CY
CY
CY
CY
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
The operation of the EBDIS bit is also influenced by the
program memory mode being used. This is discussed
in more detail in
Modes and the External Memory
The WAIT bits allow for the addition of Wait states to
external memory operations. The use of these bits is
discussed in
The WM bits select the particular operating mode used
when the bus is operating in 16-Bit Data Width mode.
These bits are discussed in more detail in
“16-Bit Data Width
when an 8-Bit Data Width mode is selected.
U-0
—
Section 8.3 “Wait
U-0
—
 2009-2011 Microchip Technology Inc.
Modes”. These bits have no effect
Section 8.5 “Program Memory
x = Bit is unknown
R/W-0
WM1
(1)
States”.
Bus”.
Section 8.6
R/W-0
WM0
bit 0