PIC18F85K22-I/PT Microchip Technology, PIC18F85K22-I/PT Datasheet - Page 364

• Manufacturer Part Number: PIC18F85K22-I/PT
• Description: IC, 8BIT MCU, PIC18F, 64MHZ, TQFP-80
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F85K22-I/PT

• Controller Family/series: PIC18
• No. Of I/o's: 69
• Eeprom Memory Size: 1KB
• Ram Memory Size: 2KB
• Cpu Speed: 64MHz
• No. Of Timers: 8
• Core Size: 8 Bit
• Program Memory Size: 32KB
• Core Processor: PIC
• Speed: 64MHz
• Connectivity: EBI/EMI, I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 24x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F87K22 FAMILY
23.7
Figure 23-6
after the GO/DONE bit has been set and the
ACQT<2:0> bits are cleared. A conversion is started
after the following instruction to allow entry into Sleep
mode before the conversion begins.
Figure 23-7
after the GO/DONE bit has been set, the ACQT<2:0>
bits set to ‘ 010 ’ and a 4 T
Clearing the GO/DONE bit during a conversion will
abort the current conversion. The A/D Result register
pair will NOT be updated with the partially completed
A/D
FIGURE 23-6:
FIGURE 23-7:
DS39960D-page 364
(Holding capacitor continues
acquiring input)
Set GO/DONE bit
1
conversion
A/D Conversions
T
T
Set GO/DONE bit
CY
Automatic
Acquisition
Time
ACQT
Holding capacitor is disconnected from analog input (typically 100 ns)
shows the operation of the A/D Converter
shows the operation of the A/D Converter
2
- T
AD
Cycles
Conversion starts
T
3
AD
sample.
A/D CONVERSION T
A/D CONVERSION T
1 T
AD
4
b11
AD
acquisition time selected.
2 T
Conversion starts
(Holding capacitor is disconnected)
1
This
b10
AD
3 T
b11
2
AD
means
Next Q4: ADRESH:ADRESL is loaded, GO/DONE bit is cleared,
b9
Next Q4: ADRESH:ADRESL is loaded, GO/DONE bit is cleared,
4 T
b10
3
AD
AD
AD
b8
5 T
CYCLES (ACQT<2:0> = 000, T
CYCLES (ACQT<2:0> = 010, T
ADIF bit is set, holding capacitor is reconnected to analog input.
the
ADIF bit is set, holding capacitor is connected to analog input.
b9
4
AD
b7
6 T
T
5
b8
AD
AD
b6
7 T
Cycles
ADRESH:ADRESL registers will continue to contain
the value of the last completed conversion (or the last
value written to the ADRESH:ADRESL registers).
After the A/D conversion is completed or aborted, a
2 T
be started. After this Wait, acquisition on the selected
channel is automatically started.
Note:
b7
AD
6
AD
b5
Wait is required before the next acquisition can
8
b6
T
7
AD
b4
The GO/DONE bit should NOT be set in
the same instruction that turns on the A/D.
9 T
b5
8
AD
b3
 2009-2011 Microchip Technology Inc.
10
ACQ
ACQ
T
b4
9
AD
b2
11
= 0)
= 4 T
T
10
b3
AD
b1
12
AD
T
b2
)
11
AD
b0
13
12
b1
13
b0