PIC18F85K22-I/PT Microchip Technology, PIC18F85K22-I/PT Datasheet - Page 26

• Manufacturer Part Number: PIC18F85K22-I/PT
• Description: IC, 8BIT MCU, PIC18F, 64MHZ, TQFP-80
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F85K22-I/PT

• Controller Family/series: PIC18
• No. Of I/o's: 69
• Eeprom Memory Size: 1KB
• Ram Memory Size: 2KB
• Cpu Speed: 64MHz
• No. Of Timers: 8
• Core Size: 8 Bit
• Program Memory Size: 32KB
• Core Processor: PIC
• Speed: 64MHz
• Connectivity: EBI/EMI, I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 24x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F87K22 FAMILY
TABLE 1-4:
DS39960D-page 26
RB0/INT0/FLT0
RB1/INT1
RB2/INT2/CTED1
RB3/INT3/CTED2/
ECCP2/P2A
RB4/KBI0
RB5/KBI1/T3CKI/T1G
RB6/KBI2/PGC
RB7/KBI3/PGD
Legend: TTL = TTL compatible input
Note 1:
RB0
INT0
FLT0
RB1
INT1
RB2
INT2
CTED1
RB3
INT3
CTED2
ECCP2
P2A
RB4
KBI0
RB5
KBI1
T3CKI
T1G
RB6
KBI2
PGC
RB7
KBI3
PGD
2:
3:
4:
5:
Pin Name
ST = Schmitt Trigger input with CMOS levels
I
P
I
Default assignment for ECCP2 when the CCP2MX Configuration bit is set.
Alternate assignment for ECCP2 when the CCP2MX Configuration bit is cleared.
Not available on PIC18F65K22 and PIC18F85K22 devices.
PSP is available only in Microcontroller mode.
The CC6, CCP7, CCP8 and CCP9 pin placement depends on the setting of the ECCPMX Configuration bit
(CONFIG3H<1>).
2
C = I
= Input
= Power
PIC18F8XK22 PINOUT I/O DESCRIPTIONS (CONTINUED)
2
C™/SMBus
Pin Number
TQFP
58
57
56
55
54
53
52
47
Type
Pin
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
Buffer
Type
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
PORTB is a bidirectional I/O port. PORTB can be software
programmed for internal weak pull-ups on all inputs.
Digital I/O.
External Interrupt 0.
Enhanced PWM Fault input for ECCP1/2/3.
Digital I/O.
External Interrupt 1.
Digital I/O.
External Interrupt 2.
CTMU Edge 1 input.
Digital I/O.
External Interrupt 3.
CTMU Edge 2 input.
Capture 2 input/Compare 2 output/PWM2 output.
Enhanced PWM2 Output A.
Digital I/O.
Interrupt-on-change pin.
Digital I/O.
Interrupt-on-change pin.
Timer3 clock input.
Timer1 external clock gate input.
Digital I/O.
Interrupt-on-change pin.
In-Circuit Debugger and ICSP™ programming clock pin.
Digital I/O.
Interrupt-on-change pin.
In-Circuit Debugger and ICSP programming data pin.
CMOS = CMOS compatible input or output
Analog = Analog input
O
OD
= Output
= Open-Drain (no P diode to V
Description
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DD
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