HD64F36077GHV Renesas Electronics America, HD64F36077GHV Datasheet - Page 275

• Manufacturer Part Number: HD64F36077GHV
• Description: 16BIT MCU FLASH 56K, SMD, LQFP64
• Manufacturer: Renesas Electronics America

Specifications of HD64F36077GHV

• No. Of I/o's: 47
• Ram Memory Size: 4KB
• Cpu Speed: 20MHz
• No. Of Timers: 4
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 4.5V
• Core Size: 16bit
• Program Memory Size: 56KB
• Oscillator Type: External Only
• Controller Family/series: H8/300H
• Peripherals: ADC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

• To change duty cycles while a 0%-duty cycle waveform is being output, write to GR
• To change duty cycles while a 100%-duty cycle waveform is being output, write to GR
b. Buffer operation is used and TPSC2 = TPSC1 = TPSC0 = 0
• To output a 0%-duty cycle waveform, write a value equal to or more than the GRA_0
• To output a 100%-duty cycle waveform, write H'0000 to the buffer register
c. Buffer operation is not used and other than TPSC2 = TPSC1 = TPSC0 = 0
• To output a 0%-duty cycle waveform, write the value while H'0000 ≤ TCNT_1 <
• To output a 100%-duty cycle waveform, write the value while previous GR value<
• To change duty cycles while a 0%-duty cycle waveform is being output, write to GR
• To change duty cycles while a 100%-duty cycle waveform is being output, write to GR
d. Buffer operation is used and other than TPSC2 = TPSC1 = TPSC0 = 0
To change duty cycles while a waveform with a duty cycle of 0% or 100% is being
output, make sure the following procedure.
while H'0000 ≤ TCNT_1 < previous GR value
while previous GR value< TCNT_0 ≤ GRA_0
Note that changing from a 0%-duty cycle waveform to a 100%-duty cycle waveform
and vice versa is not possible.
Write H'0000 or a value equal to or more than the GRA_0 value to the buffer register.
value to the buffer register
For details on buffer operation, see section 13.4.8, Buffer Operation.
Write a value which satisfies GRA_0 + 1 < GR < H'FFFF to GR directly at the timing
shown below.
previous GR value
TCNT_0 ≤ GRA_0
To change duty cycles while a waveform with a duty cycle of 0% and 100% is being
output, the following procedure must be followed.
while H'0000 ≤ TCNT_1 < previous GR value
while previous GR value< TCNT_0 ≤ GRA_0
Note that changing from a 0%-duty cycle waveform to a 100%-duty cycle waveform
and vice versa is not possible.
Write a value which satisfies GRA_0 + 1 < GR < H'FFFF to the buffer register. A
waveform with a duty cycle of 0% can be output. However, a waveform with a duty
cycle of 100% cannot be output using the buffer operation. Also, the buffer operation
cannot be used to change duty cycles while a waveform with a duty cycle of 100% is
being output. For details on buffer operation, see section 13.4.8, Buffer Operation.
Rev. 1.00 Sep. 16, 2005 Page 245 of 490
Section 13 Timer Z
REJ09B0216-0100