HD64F36077GHV Renesas Electronics America, HD64F36077GHV Datasheet - Page 344

16BIT MCU FLASH 56K, SMD, LQFP64

HD64F36077GHV

Manufacturer Part Number
HD64F36077GHV
Description
16BIT MCU FLASH 56K, SMD, LQFP64
Manufacturer
Renesas Electronics America
Datasheet

Specifications of HD64F36077GHV

No. Of I/o's
47
Ram Memory Size
4KB
Cpu Speed
20MHz
No. Of Timers
4
Digital Ic Case Style
LQFP
Supply Voltage Range
4.5V
Core Size
16bit
Program Memory Size
56KB
Oscillator Type
External Only
Controller Family/series
H8/300H
Peripherals
ADC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

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Manufacturer
Quantity
Price
Part Number:
HD64F36077GHV
Manufacturer:
RENESAS
Quantity:
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Part Number:
HD64F36077GHV
Manufacturer:
Renesas
Quantity:
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Part Number:
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Section 16 Serial Communication Interface 3 (SCI3)
Rev. 1.00 Sep. 16, 2005 Page 314 of 490
REJ09B0216-0100
Yes
No
No
Read OER and FER flags in SSR
Read OER and FER flags in SSR
Figure 16.17 Sample Multiprocessor Serial Reception Flowchart (1)
Set MPIE bit in SCR3 to 1
Read receive data in RDR
Read receive data in RDR
Clear RE bit in SCR3 to 0
Read RDRF flag in SSR
Read RDRF flag in SSR
All data received?
This station’s ID?
Start reception
FER+OER = 1
FER+OER = 1
RDRF = 1
RDRF = 1
<End>
Yes
Yes
Yes
No
No
No
[A]
Yes
No
Yes
[3]
[1]
[2]
Error processing
(Continued on
[4]
next page)
[5]
[1]
[2]
[3]
[4]
[5]
Set the MPIE bit in SCR3 to 1.
Read OER and FER in SSR to check for
errors. Receive error processing is performed
in cases where a receive error occurs.
Read SSR and check that the RDRF flag is
set to 1, then read the receive data in RDR
and compare it with this station’s ID.
If the data is not this station’s ID, set the MPIE
bit to 1 again.
When data is read from RDR, the RDRF flag
is automatically cleared to 0.
Read SSR and check that the RDRF flag is
set to 1, then read the data in RDR.
If a receive error occurs, read the OER and
FER flags in SSR to identify the error. After
performing the appropriate error processing,
ensure that the OER and FER flags are all
cleared to 0.
Reception cannot be resumed if either of
these flags is set to 1.
In the case of a framing error, a break can be
detected by reading the RxD pin value.

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