PN5120A0HN/C2,551 NXP Semiconductors, PN5120A0HN/C2,551 Datasheet - Page 72

• Manufacturer Part Number: PN5120A0HN/C2,551
• Description: IC TRANSMISSION MOD 40-HVQFN
• Manufacturer: NXP Semiconductors

Specifications of PN5120A0HN/C2,551

• Rf Type: Read / Write
• Frequency: 13.56MHz
• Features: ISO14443-A, ISO14443-B
• Package / Case: 40-VFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

NXP Semiconductors
PN512
Product data sheet
COMPANY PUBLIC
10.4.1 Data validity
10.4.2 START and STOP conditions
10.4.3 Byte format
Data on the SDA line must be stable during the HIGH clock period. The HIGH or LOW
state of the data line must only change when the clock signal on SCL is LOW.
To manage the data transfer on the I
are defined.
The I
after the START condition. The bus is free again a certain time after the STOP condition.
The bus stays busy if a repeated START (Sr) is generated instead of a STOP condition.
The START (S) and repeated START (Sr) conditions are functionally identical. Therefore,
S is used as a generic term to represent both the START (S) and repeated START (Sr)
conditions.
Each byte must be followed by an acknowledge bit. Data is transferred with the MSB first;
see
but must meet the read/write cycle format.
Fig 17. Bit transfer on the I
Fig 18. START and STOP conditions
•
•
A START condition is defined with a HIGH-to-LOW transition on the SDA line while
SCL is HIGH.
A STOP condition is defined with a LOW-to-HIGH transition on the SDA line while
SCL is HIGH.
Figure
2
C-bus master always generates the START and STOP conditions. The bus is busy
SDA
SCL
21. The number of transmitted bytes during one data transfer is unrestricted
START condition
All information provided in this document is subject to legal disclaimers.
SDA
SCL
S
Rev. 3.6 — 10 March 2011
2
C-bus
111336
data valid
data line
stable;
2
C-bus, unique START (S) and STOP (P) conditions
change
allowed
of data
STOP condition
Transmission module
mbc621
P
© NXP B.V. 2011. All rights reserved.
PN512
mbc622
SDA
SCL
72 of 125