PN5120A0HN/C2,551 NXP Semiconductors, PN5120A0HN/C2,551 Datasheet - Page 73

• Manufacturer Part Number: PN5120A0HN/C2,551
• Description: IC TRANSMISSION MOD 40-HVQFN
• Manufacturer: NXP Semiconductors

Specifications of PN5120A0HN/C2,551

• Rf Type: Read / Write
• Frequency: 13.56MHz
• Features: ISO14443-A, ISO14443-B
• Package / Case: 40-VFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

NXP Semiconductors
PN512
Product data sheet
COMPANY PUBLIC
Fig 20. Data transfer on the I
SDA
SCL
repeated START
START or
condition
10.4.4 Acknowledge
Sr
or
S
MSB
An acknowledge must be sent at the end of one data byte. The acknowledge-related clock
pulse is generated by the master. The transmitter of data, either master or slave, releases
the SDA line (HIGH) during the acknowledge clock pulse. The receiver pulls down the
SDA line during the acknowledge clock pulse so that it remains stable LOW during the
HIGH period of this clock pulse.
The master can then generate either a STOP (P) condition to stop the transfer or a
repeated START (Sr) condition to start a new transfer.
A master-receiver indicates the end of data to the slave-transmitter by not generating an
acknowledge on the last byte that was clocked out by the slave. The slave-transmitter
releases the data line to allow the master to generate a STOP (P) or repeated START (Sr)
condition.
1
Fig 19. Acknowledge on the I
2
2
by transmitter
C-bus
data output
by receiver
data output
SCL from
master
All information provided in this document is subject to legal disclaimers.
7
condition
START
Rev. 3.6 — 10 March 2011
S
8
acknowledgement
signal from slave
interrupt within slave
byte complete,
ACK
9
2
111336
C-bus
1
clock line held LOW while
interrupts are serviced
1
2
2
3 - 8
not acknowledge
signal from receiver
acknowledgement
acknowledge
ACK
8
9
Transmission module
acknowledgement
clock pulse for
repeated START
© NXP B.V. 2011. All rights reserved.
condition
STOP or
9
PN512
Sr
or
P
Sr
P
msc608
mbc602
73 of 125