EP2SGX90EF1152I4 Altera, EP2SGX90EF1152I4 Datasheet - Page 218

Stratix II GX

EP2SGX90EF1152I4

Manufacturer Part Number
EP2SGX90EF1152I4
Description
Stratix II GX
Manufacturer
Altera
Datasheet

Specifications of EP2SGX90EF1152I4

Family Name
Stratix II GX
Number Of Logic Blocks/elements
90960
# I/os (max)
558
Frequency (max)
732.1MHz
Process Technology
SRAM
Operating Supply Voltage (typ)
1.2V
Logic Cells
90960
Ram Bits
4520448
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
1152
Package Type
FC-FBGA
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP2SGX90EF1152I4
Manufacturer:
ALTERA
Quantity:
745
Part Number:
EP2SGX90EF1152I4
Manufacturer:
ALTERA
0
Part Number:
EP2SGX90EF1152I4
Manufacturer:
ALTERA
Quantity:
100
Part Number:
EP2SGX90EF1152I4N
Manufacturer:
ALTERA
Quantity:
535
Part Number:
EP2SGX90EF1152I4N
Manufacturer:
ALTERA
0
Part Number:
EP2SGX90EF1152I4N
Manufacturer:
ALTERA
Quantity:
100
Part Number:
EP2SGX90EF1152I4N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Part Number:
EP2SGX90EF1152I4N
0
Operating Conditions
4–48
Stratix II GX Device Handbook, Volume 1
Note to
(1)
Reference Clock
3.3-V PCML
1.5-V PCML
1.2-V PCML
V
V
R
Receiver
3.3-V PCML
1.5-V PCML
1.2-V PCML
V
V
R
Transmitter
1.5-V PCML
1.2-V PCML
V
V
V
R
Table 4–31. PCML Specifications
ID
ICM
ID
ICM
CCH
OD
OCM
Symbol
Stratix II GX devices support PCML input and output on GXB banks 13, 14, 15, 16, and 17. This table references
Stratix II GX PCML specifications that are located in other sections of the Stratix II GX Device Handbook.
Table
4–31:
Reference clock supported
PCML standards
Peak-to-peak differential input
voltage
Input common mode voltage
On-chip termination resistors
Receiver supported PCML
standards
Peak-to-peak differential input
voltage
Input common mode voltage
On-chip termination resistors
Transmitter supported PCML
standards
Output buffer supply voltage
Peak-to-peak differential output
voltage
Output common mode voltage
On-chip termination resistors
Parameter
Note (1)
The specifications are located in the Reference Clock section
of
The specifications listed in
input standards.
The specifications are located in the Receiver section of
Table 4–6 on page
The specifications listed in
input standards.
The specifications are located in
The specifications are located in
4–11, and 4–12.
The specifications listed in these tables are applicable to
PCML output standards.
The specifications are located in the Transmitter section of
Table 4–6 on page
The specifications listed in
output standards.
Table 4–6 on page
4–4.
4–4.
4–4.
References
Table 4–6
Table 4–6
Table 4–6
Tables
Table 4–5 on page
are applicable to PCML
are applicable to PCML
are applicable to PCML
4–7, 4–8, 4–9, 4–10,
Altera Corporation
June 2009
4–4.

Related parts for EP2SGX90EF1152I4