EP2SGX90EF1152I4 Altera, EP2SGX90EF1152I4 Datasheet - Page 53

• Manufacturer Part Number: EP2SGX90EF1152I4
• Description: Stratix II GX
• Manufacturer: Altera

Specifications of EP2SGX90EF1152I4

• Family Name: Stratix II GX
• Number Of Logic Blocks/elements: 90960
• # I/os (max): 558
• Frequency (max): 732.1MHz
• Process Technology: SRAM
• Operating Supply Voltage (typ): 1.2V
• Logic Cells: 90960
• Ram Bits: 4520448
• Operating Supply Voltage (min): 1.15V
• Operating Supply Voltage (max): 1.25V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 1152
• Package Type: FC-FBGA
• Lead Free Status / Rohs Status: Not Compliant

Figure 2–32. Stratix II GX LAB Structure
Altera Corporation
October 2007
Direct link
interconnect from
adjacent block
Direct link
interconnect to
adjacent block
LAB Interconnects
The LAB local interconnect can drive all eight ALMs in the same LAB. It
is driven by column and row interconnects and ALM outputs in the same
LAB. Neighboring LABs, M512 RAM blocks, M4K RAM blocks, M-RAM
blocks, or digital signal processing (DSP) blocks from the left and right
can also drive a LAB’s local interconnect through the direct link
connection. The direct link connection feature minimizes the use of row
and column interconnects, providing higher performance and flexibility.
Each ALM can drive 24 ALMs through fast local and direct link
interconnects.
Local Interconnect
LAB
from Either Side by Columns & LABs,
Local Interconnect is Driven
& from Above by Rows
Stratix II GX Device Handbook, Volume 1
Row Interconnects of
Variable Speed & Length
ALMs
Stratix II GX Architecture
Column Interconnects of
Variable Speed & Length
Direct link
interconnect from
adjacent block
Direct link
interconnect to
adjacent block
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