KSZ8995MA B3 Micrel Inc, KSZ8995MA B3 Datasheet - Page 29

• Manufacturer Part Number: KSZ8995MA B3
• Manufacturer: Micrel Inc

Specifications of KSZ8995MA B3

• Number Of Primary Switch Ports: 5
• Internal Memory Buffer Size: 64
• Operating Supply Voltage (typ): 1.8/2.5/3.3V
• Fiber Support: Yes
• Integrated Led Drivers: Yes
• Phy/transceiver Interface: MII/SNI
• Power Supply Type: Analog/Digital
• Package Type: PQFP
• Data Rate (typ): 10/100Mbps
• Vlan Support: Yes
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Pin Count: 128
• Mounting: Surface Mount
• Jtag Support: No
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Compliant

Semptember 2008
MII Interface Operation
The media independent interface (MII) is specified by the IEEE 802.3 committee and provides a common interface
betweenphysical layer and MAC layer devices. The KS8995MA/FQ provides two such interfaces. The MII-P5
interface is used to connectto the fifth PHY, whereas the MII-SW interface is used to connect to the fifth MAC. Each
of these MII interfaces contains twodistinct groups of signals, one for transmission and the other for receiving. Table
1 describes the signals used in the MII-P5 interface.
SNI Signal
MRXDV
MRXER
MTXEN
MTXER
MRXD3
MRXD2
MRXD1
MRXD0
MTXD3
MTXD2
MTXD1
MTXD0
MTXC
MCOL
MCRS
MRXC
MDIO
MDC
Table 1. MII – P5 Signals (PHY Mode)
Management data clock
Management data I/O
Transmit data bit 3
Transmit data bit 2
Transmit data bit 1
Transmit data bit 0
Collision detection
Receive data valid
Receive data bit 3
Receive data bit 2
Receive data bit 1
Receive data bit 0
Transmit enable
Transmit clock
Transmit error
Receive clock
Carrier sense
Receive error
Description
29
KS8995MA/FQ Signal
PMTXD[3]
PMTXD[2]
PMTXD[1]
PMTXD[0]
PMRXD[3]
PMRXD[2]
PMRXD[1]
PMRXD[0]
PMRXDV
PMRXER
PMTXEN
PMTXER
PMRXC
PMTXC
PCOL
PCRS
MDIO
MDC
M9999-091508