KSZ8995MA B3 Micrel Inc, KSZ8995MA B3 Datasheet - Page 46

• Manufacturer Part Number: KSZ8995MA B3
• Manufacturer: Micrel Inc

Specifications of KSZ8995MA B3

• Number Of Primary Switch Ports: 5
• Internal Memory Buffer Size: 64
• Operating Supply Voltage (typ): 1.8/2.5/3.3V
• Fiber Support: Yes
• Integrated Led Drivers: Yes
• Phy/transceiver Interface: MII/SNI
• Power Supply Type: Analog/Digital
• Package Type: PQFP
• Data Rate (typ): 10/100Mbps
• Vlan Support: Yes
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Pin Count: 128
• Mounting: Surface Mount
• Jtag Support: No
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Compliant

Semptember 2008
Note:
1.
Address
1
0
Register 6 (0x07): Global Control 4
7
6
5
4
3
2-0
Register 7 (0x07): Global Control 5
7-0
Register 8 (0x08): Global Control 6
7-0
Register 9 (0x09): Global Control 7
7-0
148,800 frames/sec × 50ms/interval × 1% = 74 frames/interval (approx.) = 0x4A.
Name
Enable “Tag” Mask
Sniff Mode Select
Switch MII Back
Pressure Enable
Switch MII Half-Duplex
Mode
Switch MII Flow
Control Enable
Switch MII 10BT
Null VID Replacement
Broadcast Storm
Protection Rate Bit [10:8]
Broadcast Storm
Protection Rate Bit [7:0]
Factory Testing
Factory Testing
This along with the previous register determines how many
“64 byte blocks” of packet data are allowed on an input
port in a preset period. The period is 50ms for
100BT or 500ms for 10BT. The default is 1%.
Reserved
Reserved
Description
1, the last 5 digits in the VID field are used as a mask to
determine which port(s) the packet should be forwarded
to.
0, no tag masks.
1, will do Rx AND Tx sniff (both source port and
destination port need to match).
0, will do Rx OR Tx sniff (Either source port or destination
port needs to match).
This is the mode used to implement Rx only sniff.
1, enable half-duplex back pressure on switch MII
interface.
0, disable back pressure on switch MII interface.
1, enable MII interface half-duplex mode.
0, enable MII interface full-duplex mode.
1, enable full-duplex flow control on switch MII interface.
0, disable full-duplex flow control on switch MII interface.
1, the switch interface is in 10Mbps mode.
0, the switch interface is in 100Mbps mode.
1, will replace null VID with port VID (12 bits).
0, no replacement for null VID.
This along with the next register determines how many
“64 byte blocks” of packet data allowed on an input port in
a preset period. The period is 50ms for 100BT or 500ms
for 10BT. The default is 1%.
46
Mode
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Pin SMRXD2
strap option. Pull-
down (0): Full-
duplex mode. Pull-
up (1): Half-duplex
mode. Note:
SMRXD2 has
internal pull-down.
Pin SMRXD3
strap
option. Pull-down
(0): disable flow
control. Pull-up(1):
enable flow
control.
Note: SMRXD3
has internal pull-
down.
Pin SMRXD1
strap option. Pull-
down (0): Enable
100Mbps. Pull-up
(1): Enable
10Mpbs.
Note: SMRXD1
has internal pull-
down.
M9999-091508
Default
0x4A
0x24
0x28
000
0
0
0
0
(1)