KSZ8995MA B3 Micrel Inc, KSZ8995MA B3 Datasheet - Page 48

• Manufacturer Part Number: KSZ8995MA B3
• Manufacturer: Micrel Inc

Specifications of KSZ8995MA B3

• Number Of Primary Switch Ports: 5
• Internal Memory Buffer Size: 64
• Operating Supply Voltage (typ): 1.8/2.5/3.3V
• Fiber Support: Yes
• Integrated Led Drivers: Yes
• Phy/transceiver Interface: MII/SNI
• Power Supply Type: Analog/Digital
• Package Type: PQFP
• Data Rate (typ): 10/100Mbps
• Vlan Support: Yes
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Pin Count: 128
• Mounting: Surface Mount
• Jtag Support: No
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Compliant

Semptember 2008
Port Registers
The following registers are used to enable features that are assigned on a per port basis. The register bit
assignments are the same for all ports, but the address for each port is different, as indicated.
Register 16 (0x10): Port 1 Control 0
Register 32 (0x20): Port 2 Control 0
Register 48 (0x30): Port 3 Control 0
Register 64 (0x40): Port 4 Control 0
Register 80 (0x50): Port 5 Control 0
Address
7
6
5
4
3
2
1
0
Name
Broadcast Storm
Protection Enable
DiffServ Priority
Classification Enable
802.1p Priority
Classification Enable
Port-Based Priority
Classification Enable
Reserved
Tag insertion
Tag Removal
Priority Enable
Description
1, enable broadcast storm protection for ingress
packets on the port.
0, disable broadcast storm protection.
1, enable DiffServ priority classification for ingress
packets on port.
0, disable DiffServ function.
1, enable 802.1p priority classification for ingress
packets on port.
0, disable 802.1p.
1, ingress packets on the port will be classified as high
priority if “DiffServ” or “802.1p” classification is not
enabled or fails to classify.
0, ingress packets on port will be classified as low
priority if “DiffServ” or “802.1p” classification is not
enabled or fails to classify.
Note: “DiffServ”, “802.1p” and port priority can be
enabled at the same time. The OR’ed result of 802.1p
and DSCP overwrites the port priority.
Reserved
1, when packets are output on the port, the switch will
add 802.1q tags to packets without 802.1q tags when
received. The switch will not add tags to packets
already tagged. The tag inserted is the ingress port’s
“port VID.”
0, disable tag insertion.
1, when packets are output on the port, the switch will
remove 802.1q tags from packets with 802.1q tags
when received. The switch will not modify packets
received without tags.
0, disable tag removal.
1, the port output queue is split into high and low
priority queues.
0, single output queue on the port. There is no priority
differentiation even though packets are classified into
high or low priority.
48
Mode
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
M9999-091508
Default
0
0
0
0
0
0
0
0