KSZ8995MA B3 Micrel Inc, KSZ8995MA B3 Datasheet - Page 33

• Manufacturer Part Number: KSZ8995MA B3
• Manufacturer: Micrel Inc

Specifications of KSZ8995MA B3

• Number Of Primary Switch Ports: 5
• Internal Memory Buffer Size: 64
• Operating Supply Voltage (typ): 1.8/2.5/3.3V
• Fiber Support: Yes
• Integrated Led Drivers: Yes
• Phy/transceiver Interface: MII/SNI
• Power Supply Type: Analog/Digital
• Package Type: PQFP
• Data Rate (typ): 10/100Mbps
• Vlan Support: Yes
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Pin Count: 128
• Mounting: Surface Mount
• Jtag Support: No
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Compliant

Micrel, Inc.
For packets from regular ports (port 1 - port 4) to port 5, the port mask is used to tell the processor which port the
packet was received on, defined as:
No values other than the previous four defined should be received in this direction in the special mode. Table 6
shows the egress rule for this direction.
IGMP Support
There are two parts involved to support IGMP in Layer 2. The first part is “IGMP” snooping. The switch will trap IGMP
packets and forward them only to the processor port. The IGMP packets are identified as IP packets (either Ethernet
IP packets or IEEE 802.3 SNAP IP packets) AND IP version = 0x4 AND protocol number = 0x2. The second part is
“multicast address insertion” in the static MAC table. Once the multicast address is programmed in the static MAC
table, the multicast session will be trimmed to the subscribed ports, instead of broadcasting to all ports. To enable
this feature, set Register 5 bit 6 to 1. Also “special tag mode” needs to be enabled, so that the processor knows
which port the IGMP packet was received on. Enable “special tag mode” by setting both Register 11 bit 0 and
Register 80 bit 2.
Semptember 2008
Ingress Tag Field
(0x810+ port mask)
(0x810+ port mask)
(0x810+ port mask)
(0x810+ port mask)
Not tagged
Ingress Packets
Tagged with 0x8100 + TCI
Not tagged
“0001” from port 1,
“0010” from port 2,
“0100” from port 3,
“1000” from port 4
“Tag Insertion”
Don’t care
Tx Port
Egress Action to Tag Field
0
0
1
1
Table 5. STPID Egress Rules (Processor to Switch Port 5)
•
•
•
•
•
•
•
Modify TPID to 0x810 + “port mask,” which indicates source port.
No change to TCI, if VID is not null.
Replace null VID with ingress port VID.
Recalculate CRC.
Insert TPID to 0x810 + “port mask,” which indicates source port.
Insert TCI with ingress port VID.
Recalculate CRC.
Table 6. STPID Egress Rules (Switch to Processor)
“Tag Removal”
Don’t care
Tx Port
0
1
0
1
33
Egress Action to Tag Field
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Determined by the dynamic MAC address table.
Modify tag field to 0x8100.
Recalculate CRC.
No change to TCI if not null VID.
Replace VID with ingress (port 5) port VID if null VID.
(STPID + TCI) will be removed.
Padding to 64 bytes if necessary.
Recalculate CRC.
Modify tag field to 0x8100.
Recalculate CRC.
No change to TCI if not null VID.
Replace VID with ingress (port 5) port VID if null VID.
Modify tag field to 0x8100.
Recalculate CRC.
No change to TCI if not null VID.
Replace VID with ingress (port 5) port VID if null VID.
KS8995MA/FQ
M9999-091508