DJLXT6282LE.A3 Intel, DJLXT6282LE.A3 Datasheet - Page 33

• Manufacturer Part Number: DJLXT6282LE.A3
• Manufacturer: Intel

Specifications of DJLXT6282LE.A3

• Lead Free Status / RoHS Status: Not Compliant

4.1.6
4.1.7
4.1.8
Datasheet
Bit <7:2>
Bit <1:0>
Bit <7:0>
Bit <7:0>
Bit
Bit
Bit
Unused
BfrAllCntrs[1:0]
GenRcvAISCh<7:0>
GenXmtAISCh<7:0>
BUFF_ALLCNT - Buffer All Counters (5FH)
A write to this location causes all of the counters of the same type to be loaded into buffers and
then cleared. This operation assumes that those counters can be monitored in the same second. The
contents of an individual counter buffer can then be read at the addresses specified for the counters
in this document. Counters can be individually buffered by writing to the specified MSByt of the
counter of interest.
E1_RCV_AISTAT - E1 Receivers AIS Status (8FH)
This register indicates the status of internal chip logic for AIS generation processes in each of the
eight E1 receivers.
EI_XMT_AISTAT - E1 Transmitters AIS Status (9FH)
This register indicates the status of internal chip logic for AIS generation processes in each of the
eight E1 transmitters.
Name
Name
Name
A write to these bits selects the counters to be loaded at the
same time.
00 - all CRC-4 Block Error counters both transmit and receive
(16 x 10-bit counters) plus all Positive and Negative Frame Slip
Counters (transmit side: 16 x 4-bit counters)
01 - all REBE Counters both transmit and receive (16x 10-bit
counters) plus all Retiming FIFO Status Bits (transmit side: 8 x
6-bits, 8 registers iDH)
10 - all FrameWord Error Counters both receive and transmit (16
x 13-bit counters)
11 - all Code Errors counters (receive side) (8 x 16-bit counters)
Present status of E1 receiver #n (n= <7..0>) AIS generator.
0 - No AIS
1 - AIS
Present status of E1 transmitter #n (n=<7..0>) AIS generator.
0 - No AIS
1 - AIS
Label
Label
Label
Type
WO
Type
Type
RO
RO
LXT6282
Default
Default
Default
0
0
0
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