DJLXT6282LE.A3 Intel, DJLXT6282LE.A3 Datasheet - Page 35

• Manufacturer Part Number: DJLXT6282LE.A3
• Manufacturer: Intel

Specifications of DJLXT6282LE.A3

• Lead Free Status / RoHS Status: Not Compliant

4.2.1
Datasheet
Bit 7
Bit 6
Bit 5
Bit 4
Bit
CenterRetFifo
XmtDjtAisEn
InsBpv
XmtAisFrc
Name
Status alarms will generate an interrupt when the alarm changes from inactive to active or active to
inactive. The event and overflow alarms generate an interrupt when detected.
Updating the status register is controlled by the AlmUp-dateDsbl configuration bit in global
register 0FH. When low, status register are updated once every frame, regardless of the interrupt
state. When high, status alarm memory updates will be disabled. When accessing status alarm
memory, the microprocessor should SET AlmUpdateDsbl so that the microprocessor will have
uncontested access to this memory.
XMT_CONF - Transmitter Configuration (iEH)
(i = [0 to 7] and corresponds to the eight different E1 channel numbers)
This register configures a particular E1 channel transmitter’s parameters.
•
•
•
Interrupt source: This register set will identify the alarm(s) that triggered the interrupt.
Alarm status: This register contains the current status of the alarm. When this register is read,
the corresponding interrupt will be cleared.
Interrupt Enable: This register contains the interrupt enable for all alarms.
A transition from 0 to 1 in this bit sets the two frame-wide retiming elastic store
to its center point (only relevant in retiming mode).
Enable/disable hardware AIS generation on the transmit data and clock
outputs (to the LIU) via software (only relevant in dejitter mode). This bit
should be set to 0 before changing the mode from dejitter.
0 - Disable AIS generation because of unlocked PLL
1 - Enable AIS generation because of unlocked PLL
Inserts a code error (Bipolar Violation) in the transmitter HDB3 output
(TPOSD and TNEGD, to the LIU). See CnfBpvIns[1..0] configuration bits in
global register 0FH for the error repetition.
0 - Normal operation
1 - Insert Bpv errors (see register 0FH)
Forces AIS generation on the transmit data and clock outputs (to the LIU).
0 - Disable
1 - Enable
Label
Type
R/W
R/W
R/W
W
LXT6282
Default
0
0
0
0
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